All of lore.kernel.org
 help / color / mirror / Atom feed
From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>,
	<dri-devel@lists.freedesktop.org>, <airlied@gmail.com>,
	<daniel.vetter@ffwll.ch>
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: [pull] amdgpu drm-next-6.3
Date: Fri, 27 Jan 2023 17:59:17 -0500	[thread overview]
Message-ID: <20230127225917.2419162-1-alexander.deucher@amd.com> (raw)

Hi Dave, Daniel,

A few more new things for 6.3.

The following changes since commit b4a9b36e69e935104e52e561aa9a82d39b5efc36:

  Documentation/gpu: update dGPU asic info table (2023-01-19 17:24:26 -0500)

are available in the Git repository at:

  https://gitlab.freedesktop.org/agd5f/linux.git tags/amd-drm-next-6.3-2023-01-27

for you to fetch changes up to cdf657fc1f4c9758f86ae3adeb32ee68cbd90691:

  amdgpu: fix build on non-DCN platforms. (2023-01-27 17:25:40 -0500)

----------------------------------------------------------------
amd-drm-next-6.3-2023-01-27:

amdgpu:
- GC11 fixes
- SMU13 fixes
- Freesync fixes
- DP MST fixes
- DP MST code rework and cleanup
- AV1 fixes for VCN4
- DCN 3.2.x fixes
- PSR fixes
- DML optimizations
- DC link code rework

----------------------------------------------------------------
Alex Deucher (1):
      drm/amdgpu/vcn4: add missing encoder cap

Alvin Lee (4):
      drm/amd/display: Allow idle optimization after turning off all pipes
      drm/amd/display: Disable SubVP for PSR panels
      drm/amd/display: Use |= when assigning wm_optimized_required
      drm/amd/display: Set init freq for DCFCLK DS

Anthony Koo (1):
      drm/amd/display: [FW Promotion] Release 0.0.150.0

Aric Cyr (2):
      drm/amd/display: 3.2.219
      drm/amd/display: 3.2.220

Aurabindo Pillai (3):
      drm/amd/display: Revert "ignore msa parameter only if freesync is enabled"
      drm/amd/display: set allow_freesync parameter in DM
      drm/amd/display: Fix timing not changning when freesync video is enabled

Dave Airlie (1):
      amdgpu: fix build on non-DCN platforms.

David (Ming Qiang) Wu (1):
      drm/amdgpu: limit AV1 to the first instance on VCN4 encode

Dillon Varone (1):
      drm/amd/display: Disable MALL SS and messages for PSR supported configs

Evan Quan (1):
      drm/amd/pm: add missing AllowIHInterrupt message mapping for SMU13.0.0

Hamza Mahfooz (1):
      drm/amd/display: use a more appropriate return value in dp_retrieve_lttpr_cap()

Ilya Bakoulin (1):
      drm/amd/display: Speed up DML fast_validate path

Jingwen Zhu (1):
      drm/amd/display: avoid disable otg when dig was disabled

Jonathan Kim (1):
      drm/amdgpu: remove unconditional trap enable on add gfx11 queues

Li Ma (2):
      drm/amdgpu: enable imu firmware for GC 11.0.4
      drm/amdgpu: declare firmware for new MES 11.0.4

Lyude Paul (1):
      drm/amdgpu/display/mst: Fix mst_state->pbn_div and slot count assignments

Qingqing Zhuo (1):
      drm/amd/display: force connector state when bpc changes during compliance

Robin Chen (1):
      drm/amd/display: Pass DSC slice height to PSR FW

Roman Li (1):
      drm/amd/display: Set hvm_enabled flag for S/G mode

Saaem Rizvi (1):
      drm/amd/display: Correcting prefetch mode for fast validate

Samson Tam (1):
      drm/amd/display: adjust MALL size available for DCN32 and DCN321

Stylon Wang (2):
      drm/amd/display: Guard Freesync HDMI parsing with dc_lock
      drm/amd/display: Properly reuse completion structure

Sung Joon Kim (1):
      drm/amd/display: Enable AdaptiveSync in DC interface

Tim Huang (1):
      drm/amdgpu: skip psp suspend for IMU enabled ASICs mode2 reset

Wayne Lin (6):
      drm/amdgpu/display/mst: limit payload to be updated one by one
      drm/amdgpu/display/mst: update mst_mgr relevant variable when long HPD
      drm/drm_print: correct format problem
      drm/display/dp_mst: Correct the kref of port.
      drm/amdgpu/display/mst: adjust the naming of mst_port and port of aconnector
      drm/amdgpu/display/mst: adjust the logic in 2nd phase of updating payload

Wenjing Liu (5):
      drm/amd/display: create accessories, hwss and protocols sub folders in link
      drm/amd/display: move eDP panel control logic to link_edp_panel_control
      drm/amd/display: move dp irq handler functions from dc_link_dp to link_dp_irq_handler
      drm/amd/display: move dp cts functions from dc_link_dp to link_dp_cts
      drm/amd/display: merge dc_link_dp into dc_link

 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         |   12 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h           |    4 +-
 drivers/gpu/drm/amd/amdgpu/imu_v11_0.c             |    1 +
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c             |    3 +-
 drivers/gpu/drm/amd/amdgpu/soc21.c                 |    1 +
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c              |   62 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  |  138 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h  |    9 +-
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c  |    2 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c  |   18 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c  |  200 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c    |   54 +-
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c  |    2 +-
 drivers/gpu/drm/amd/display/dc/Makefile            |    3 +-
 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c   |    1 +
 .../amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c   |    1 +
 .../amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c |    2 +-
 .../amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c |   28 +-
 .../amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c |    2 +-
 .../amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c   |    1 -
 drivers/gpu/drm/amd/display/dc/core/dc.c           |    7 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link.c      | 1189 +++++-----
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   | 2375 --------------------
 .../gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c  |    1 -
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c  |   56 +-
 drivers/gpu/drm/amd/display/dc/dc.h                |    3 +-
 drivers/gpu/drm/amd/display/dc/dc_dp_types.h       |   21 +-
 drivers/gpu/drm/amd/display/dc/dc_link.h           |   72 +-
 drivers/gpu/drm/amd/display/dc/dc_stream.h         |    2 +
 drivers/gpu/drm/amd/display/dc/dc_types.h          |    2 +
 drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c      |    1 +
 .../amd/display/dc/dce110/dce110_hw_sequencer.c    |   38 +-
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  |    2 -
 .../amd/display/dc/dcn10/dcn10_stream_encoder.c    |    9 +-
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |    8 +-
 .../amd/display/dc/dcn20/dcn20_stream_encoder.c    |   20 +-
 .../display/dc/dcn30/dcn30_dio_stream_encoder.c    |   26 +
 .../display/dc/dcn30/dcn30_dio_stream_encoder.h    |    4 +
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c |   10 +-
 .../display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c |   25 +
 drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c |    6 +-
 .../display/dc/dcn314/dcn314_dio_stream_encoder.c  |    4 +-
 .../display/dc/dcn314/dcn314_dio_stream_encoder.h  |    4 +
 .../gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c   |    2 -
 .../display/dc/dcn32/dcn32_dio_stream_encoder.c    |    4 +-
 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c |   19 +-
 .../gpu/drm/amd/display/dc/dcn32/dcn32_resource.c  |   63 +-
 .../gpu/drm/amd/display/dc/dcn32/dcn32_resource.h  |    4 +
 .../amd/display/dc/dcn32/dcn32_resource_helpers.c  |   10 +
 .../drm/amd/display/dc/dcn321/dcn321_resource.c    |   10 +-
 drivers/gpu/drm/amd/display/dc/dm_helpers.h        |    6 +
 .../gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c   |   39 +-
 .../gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c   |   55 +-
 .../amd/display/dc/dml/dcn32/display_mode_vba_32.c |   47 +-
 .../gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c |    5 +-
 .../gpu/drm/amd/display/dc/dml/display_mode_lib.h  |    1 +
 drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c     |    2 +-
 drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h    |  117 -
 .../gpu/drm/amd/display/dc/inc/hw/stream_encoder.h |   17 +
 drivers/gpu/drm/amd/display/dc/inc/link.h          |   17 +
 drivers/gpu/drm/amd/display/dc/link/Makefile       |   36 +-
 .../amd/display/dc/link/accessories/link_dp_cts.c  | 1055 +++++++++
 .../amd/display/dc/link/accessories/link_dp_cts.h  |   33 +
 .../dc/link/{ => accessories}/link_dp_trace.c      |    8 +-
 .../dc/link/{ => accessories}/link_dp_trace.h      |    5 -
 .../amd/display/dc/link/{ => hwss}/link_hwss_dio.c |    1 -
 .../amd/display/dc/link/{ => hwss}/link_hwss_dio.h |    1 +
 .../display/dc/link/{ => hwss}/link_hwss_dpia.c    |    0
 .../display/dc/link/{ => hwss}/link_hwss_dpia.h    |    0
 .../display/dc/link/{ => hwss}/link_hwss_hpo_dp.c  |    1 -
 .../display/dc/link/{ => hwss}/link_hwss_hpo_dp.h  |    1 +
 .../amd/display/dc/link/{ => protocols}/link_ddc.c |    0
 .../amd/display/dc/link/{ => protocols}/link_ddc.h |    0
 .../dc/link/{ => protocols}/link_dp_capability.c   |   29 +-
 .../dc/link/{ => protocols}/link_dp_capability.h   |   13 +
 .../display/dc/link/{ => protocols}/link_dp_dpia.c |    2 -
 .../display/dc/link/{ => protocols}/link_dp_dpia.h |    0
 .../dc/link/{ => protocols}/link_dp_dpia_bw.c      |    0
 .../dc/link/{ => protocols}/link_dp_dpia_bw.h      |    0
 .../dc/link/protocols/link_dp_irq_handler.c        |  401 ++++
 .../link_dp_irq_handler.h}                         |   15 +-
 .../display/dc/link/{ => protocols}/link_dp_phy.c  |   33 +-
 .../display/dc/link/{ => protocols}/link_dp_phy.h  |    5 +
 .../dc/link/{ => protocols}/link_dp_training.c     |   14 +-
 .../dc/link/{ => protocols}/link_dp_training.h     |    3 +
 .../{ => protocols}/link_dp_training_128b_132b.c   |    1 -
 .../{ => protocols}/link_dp_training_128b_132b.h   |    0
 .../link/{ => protocols}/link_dp_training_8b_10b.c |    1 -
 .../link/{ => protocols}/link_dp_training_8b_10b.h |    0
 .../{ => protocols}/link_dp_training_auxless.c     |    1 -
 .../{ => protocols}/link_dp_training_auxless.h     |    0
 .../link/{ => protocols}/link_dp_training_dpia.c   |    1 -
 .../link/{ => protocols}/link_dp_training_dpia.h   |    0
 .../link_dp_training_fixed_vs_pe_retimer.c         |    1 -
 .../link_dp_training_fixed_vs_pe_retimer.h         |    0
 .../display/dc/link/{ => protocols}/link_dpcd.c    |    0
 .../display/dc/link/{ => protocols}/link_dpcd.h    |    0
 .../dc/link/protocols/link_edp_panel_control.c     |  833 +++++++
 .../dc/link/protocols/link_edp_panel_control.h     |   33 +
 .../amd/display/dc/link/{ => protocols}/link_hpd.c |    0
 .../amd/display/dc/link/{ => protocols}/link_hpd.h |    0
 drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h    |   10 +-
 .../drm/amd/display/modules/inc/mod_info_packet.h  |   36 +
 .../amd/display/modules/info_packet/info_packet.c  |   55 +
 .../drm/amd/display/modules/power/power_helpers.c  |    8 +-
 .../drm/amd/display/modules/power/power_helpers.h  |    2 +-
 .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   |    1 +
 drivers/gpu/drm/display/drm_dp_mst_topology.c      |    4 +-
 include/drm/drm_print.h                            |    2 +-
 109 files changed, 4136 insertions(+), 3356 deletions(-)
 delete mode 100644 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
 delete mode 100644 drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.h
 rename drivers/gpu/drm/amd/display/dc/link/{ => accessories}/link_dp_trace.c (95%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => accessories}/link_dp_trace.h (91%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => hwss}/link_hwss_dio.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => hwss}/link_hwss_dio.h (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => hwss}/link_hwss_dpia.c (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => hwss}/link_hwss_dpia.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => hwss}/link_hwss_hpo_dp.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => hwss}/link_hwss_hpo_dp.h (98%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_ddc.c (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_ddc.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_capability.c (98%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_capability.h (85%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_dpia.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_dpia.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_dpia_bw.c (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_dpia_bw.h (100%)
 create mode 100644 drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
 rename drivers/gpu/drm/amd/display/dc/link/{link_hwss_hpo_frl.h => protocols/link_dp_irq_handler.h} (80%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_phy.c (98%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_phy.h (93%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training.h (98%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_128b_132b.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_128b_132b.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_8b_10b.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_8b_10b.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_auxless.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_auxless.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_dpia.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_dpia.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_fixed_vs_pe_retimer.c (99%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dp_training_fixed_vs_pe_retimer.h (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dpcd.c (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_dpcd.h (100%)
 create mode 100644 drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_hpd.c (100%)
 rename drivers/gpu/drm/amd/display/dc/link/{ => protocols}/link_hpd.h (100%)

             reply	other threads:[~2023-01-27 22:59 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-27 22:59 Alex Deucher [this message]
2023-02-03 22:03 [pull] amdgpu drm-next-6.3 Alex Deucher
2023-02-17 23:09 Alex Deucher

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230127225917.2419162-1-alexander.deucher@amd.com \
    --to=alexander.deucher@amd.com \
    --cc=airlied@gmail.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=daniel.vetter@ffwll.ch \
    --cc=dri-devel@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.