From: Jisheng Zhang <jszhang@kernel.org> To: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Heiko Stuebner <heiko@sntech.de>, Andrew Jones <ajones@ventanamicro.com>, Conor Dooley <conor.dooley@microchip.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v5 02/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Date: Sun, 29 Jan 2023 01:28:45 +0800 [thread overview] Message-ID: <20230128172856.3814-3-jszhang@kernel.org> (raw) In-Reply-To: <20230128172856.3814-1-jszhang@kernel.org> Currently riscv_cpufeature_patch_func() does nothing at the RISCV_ALTERNATIVES_EARLY_BOOT stage. Add a check to detect whether we are in this stage and exit early. This will allow us to use riscv_cpufeature_patch_func() for scanning of all ISA extensions. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> --- arch/riscv/kernel/cpufeature.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 62443fd32fa7..59e20cad1b3d 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -330,6 +330,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry *alt; u32 tmp; + if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) + return; + for (alt = begin; alt < end; alt++) { if (alt->vendor_id != 0) continue; -- 2.38.1
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org> To: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Heiko Stuebner <heiko@sntech.de>, Andrew Jones <ajones@ventanamicro.com>, Conor Dooley <conor.dooley@microchip.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v5 02/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Date: Sun, 29 Jan 2023 01:28:45 +0800 [thread overview] Message-ID: <20230128172856.3814-3-jszhang@kernel.org> (raw) In-Reply-To: <20230128172856.3814-1-jszhang@kernel.org> Currently riscv_cpufeature_patch_func() does nothing at the RISCV_ALTERNATIVES_EARLY_BOOT stage. Add a check to detect whether we are in this stage and exit early. This will allow us to use riscv_cpufeature_patch_func() for scanning of all ISA extensions. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> --- arch/riscv/kernel/cpufeature.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 62443fd32fa7..59e20cad1b3d 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -330,6 +330,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry *alt; u32 tmp; + if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) + return; + for (alt = begin; alt < end; alt++) { if (alt->vendor_id != 0) continue; -- 2.38.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-01-28 17:40 UTC|newest] Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-28 17:28 [PATCH v5 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 01/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang [this message] 2023-01-28 17:28 ` [PATCH v5 02/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 03/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 04/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 05/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 06/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-03-22 12:01 ` Jason A. Donenfeld 2023-03-22 12:01 ` Jason A. Donenfeld 2023-03-22 12:09 ` [PATCH] riscv: require alternatives framework when selecting FPU support Jason A. Donenfeld 2023-03-22 12:09 ` Jason A. Donenfeld 2023-03-22 12:46 ` Andrew Jones 2023-03-22 12:46 ` Andrew Jones 2023-03-22 15:17 ` Conor Dooley 2023-03-22 15:17 ` Conor Dooley 2023-03-22 19:26 ` Andrew Jones 2023-03-22 19:26 ` Andrew Jones 2023-03-22 19:44 ` Conor Dooley 2023-03-22 19:44 ` Conor Dooley 2023-03-22 20:05 ` Conor Dooley 2023-03-22 20:05 ` Conor Dooley 2023-03-22 20:19 ` Jason A. Donenfeld 2023-03-22 20:19 ` Jason A. Donenfeld 2023-03-23 14:49 ` Conor Dooley 2023-03-23 14:49 ` Conor Dooley 2023-03-23 15:56 ` Jason A. Donenfeld 2023-03-23 15:56 ` Jason A. Donenfeld 2023-03-23 22:19 ` Conor Dooley 2023-03-23 22:19 ` Conor Dooley 2023-01-28 17:28 ` [PATCH v5 07/13] riscv: module: move find_section to module.h Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 08/13] riscv: module: Add ADD16 and SUB16 rela types Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 09/13] riscv: switch to relative alternative entries Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-01-28 17:28 ` [PATCH v5 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang 2023-01-28 17:28 ` Jisheng Zhang 2023-02-02 23:39 ` [PATCH v5 00/13] riscv: improve boot time isa extensions handling Palmer Dabbelt 2023-02-02 23:39 ` Palmer Dabbelt 2023-02-02 23:40 ` patchwork-bot+linux-riscv 2023-02-02 23:40 ` patchwork-bot+linux-riscv 2023-02-12 15:43 ` Guenter Roeck 2023-02-12 15:43 ` Guenter Roeck 2023-02-12 15:59 ` Conor Dooley 2023-02-12 15:59 ` Conor Dooley 2023-02-12 16:33 ` Conor Dooley 2023-02-12 16:33 ` Conor Dooley 2023-02-12 17:06 ` Conor Dooley 2023-02-12 17:06 ` Conor Dooley 2023-02-12 18:06 ` Conor Dooley 2023-02-12 18:06 ` Conor Dooley 2023-02-12 18:14 ` Guenter Roeck 2023-02-12 18:14 ` Guenter Roeck 2023-02-12 18:20 ` Conor Dooley 2023-02-12 18:20 ` Conor Dooley 2023-02-12 18:38 ` Guenter Roeck 2023-02-12 18:38 ` Guenter Roeck 2023-02-12 18:45 ` Conor Dooley 2023-02-12 18:45 ` Conor Dooley 2023-02-12 20:27 ` Guenter Roeck 2023-02-12 20:27 ` Guenter Roeck 2023-02-12 20:39 ` Conor Dooley 2023-02-12 20:39 ` Conor Dooley 2023-02-12 22:21 ` Guenter Roeck 2023-02-12 22:21 ` Guenter Roeck
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