From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: openbmc@lists.ozlabs.org
Cc: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Joel Stanley" <joel@jms.id.au>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH] ARM: dts: wpcm450: Add nuvoton,shm = <&shm> to FIU node
Date: Sun, 29 Jan 2023 12:26:11 +0100 [thread overview]
Message-ID: <20230129112611.1176517-1-j.neuschaefer@gmx.net> (raw)
The Flash Interface Unit (FIU) should have a reference to the Shared
Memory controller (SHM) so that flash access from the host (x86 computer
managed by the WPCM450 BMC) can be blocked during flash access by the
FIU driver.
Fixes: 38abcb0d68767 ("ARM: dts: wpcm450: Add FIU SPI controller node")
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index 299fcbba3089b..fda2f13093f98 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -478,6 +478,7 @@ fiu: spi-controller@c8000000 {
reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
reg-names = "control", "memory";
clocks = <&clk WPCM450_CLK_FIU>;
+ nuvoton,shm = <&shm>;
status = "disabled";
};
--
2.39.0
WARNING: multiple messages have this Message-ID (diff)
From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: openbmc@lists.ozlabs.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Jonathan Neuschäfer" <j.neuschaefer@gmx.net>,
"Rob Herring" <robh+dt@kernel.org>,
"Joel Stanley" <joel@jms.id.au>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>
Subject: [PATCH] ARM: dts: wpcm450: Add nuvoton,shm = <&shm> to FIU node
Date: Sun, 29 Jan 2023 12:26:11 +0100 [thread overview]
Message-ID: <20230129112611.1176517-1-j.neuschaefer@gmx.net> (raw)
The Flash Interface Unit (FIU) should have a reference to the Shared
Memory controller (SHM) so that flash access from the host (x86 computer
managed by the WPCM450 BMC) can be blocked during flash access by the
FIU driver.
Fixes: 38abcb0d68767 ("ARM: dts: wpcm450: Add FIU SPI controller node")
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index 299fcbba3089b..fda2f13093f98 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -478,6 +478,7 @@ fiu: spi-controller@c8000000 {
reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
reg-names = "control", "memory";
clocks = <&clk WPCM450_CLK_FIU>;
+ nuvoton,shm = <&shm>;
status = "disabled";
};
--
2.39.0
next reply other threads:[~2023-01-29 11:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-29 11:26 Jonathan Neuschäfer [this message]
2023-01-29 11:26 ` [PATCH] ARM: dts: wpcm450: Add nuvoton,shm = <&shm> to FIU node Jonathan Neuschäfer
2023-02-01 4:32 ` Joel Stanley
2023-02-01 4:32 ` Joel Stanley
2023-02-01 4:41 Joel Stanley
2023-02-01 16:30 ` patchwork-bot+linux-soc
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