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From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	Chuanhong Guo <gch981213@gmail.com>
Cc: Xiangsheng Hou <xiangsheng.hou@mediatek.com>,
	<linux-mtd@lists.infradead.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<benliang.zhao@mediatek.com>, <bin.zhang@mediatek.com>,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>
Subject: [RESEND PATCH v5 03/10] mtd: nand: ecc-mtk: Add ECC support fot MT7986 IC
Date: Mon, 30 Jan 2023 11:06:49 +0800	[thread overview]
Message-ID: <20230130030656.12127-4-xiangsheng.hou@mediatek.com> (raw)
In-Reply-To: <20230130030656.12127-1-xiangsheng.hou@mediatek.com>

Add ECC support fot MT7986 IC, and change err_mask value with
GENMASK macro.

Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/mtd/nand/ecc-mtk.c | 28 +++++++++++++++++++++++++---
 1 file changed, 25 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-mtk.c
index 9f9b201fe706..c75bb8b80cc1 100644
--- a/drivers/mtd/nand/ecc-mtk.c
+++ b/drivers/mtd/nand/ecc-mtk.c
@@ -40,6 +40,10 @@
 #define ECC_IDLE_REG(op)	((op) == ECC_ENCODE ? ECC_ENCIDLE : ECC_DECIDLE)
 #define ECC_CTL_REG(op)		((op) == ECC_ENCODE ? ECC_ENCCON : ECC_DECCON)
 
+#define ECC_ERRMASK_MT7622	GENMASK(4, 0)
+#define ECC_ERRMASK_MT2701	GENMASK(5, 0)
+#define ECC_ERRMASK_MT2712	GENMASK(6, 0)
+
 struct mtk_ecc_caps {
 	u32 err_mask;
 	u32 err_shift;
@@ -79,6 +83,10 @@ static const u8 ecc_strength_mt7622[] = {
 	4, 6, 8, 10, 12
 };
 
+static const u8 ecc_strength_mt7986[] = {
+	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
+};
+
 enum mtk_ecc_regs {
 	ECC_ENCPAR00,
 	ECC_ENCIRQ_EN,
@@ -451,7 +459,7 @@ unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc)
 EXPORT_SYMBOL(mtk_ecc_get_parity_bits);
 
 static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = {
-	.err_mask = 0x3f,
+	.err_mask = ECC_ERRMASK_MT2701,
 	.err_shift = 8,
 	.ecc_strength = ecc_strength_mt2701,
 	.ecc_regs = mt2701_ecc_regs,
@@ -462,7 +470,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = {
 };
 
 static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = {
-	.err_mask = 0x7f,
+	.err_mask = ECC_ERRMASK_MT2712,
 	.err_shift = 8,
 	.ecc_strength = ecc_strength_mt2712,
 	.ecc_regs = mt2712_ecc_regs,
@@ -473,7 +481,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = {
 };
 
 static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
-	.err_mask = 0x1f,
+	.err_mask = ECC_ERRMASK_MT7622,
 	.err_shift = 5,
 	.ecc_strength = ecc_strength_mt7622,
 	.ecc_regs = mt7622_ecc_regs,
@@ -483,6 +491,17 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
 	.pg_irq_sel = 0,
 };
 
+static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
+	.err_mask = ECC_ERRMASK_MT7622,
+	.err_shift = 8,
+	.ecc_strength = ecc_strength_mt7986,
+	.ecc_regs = mt2712_ecc_regs,
+	.num_ecc_strength = 11,
+	.ecc_mode_shift = 5,
+	.parity_bits = 14,
+	.pg_irq_sel = 1,
+};
+
 static const struct of_device_id mtk_ecc_dt_match[] = {
 	{
 		.compatible = "mediatek,mt2701-ecc",
@@ -493,6 +512,9 @@ static const struct of_device_id mtk_ecc_dt_match[] = {
 	}, {
 		.compatible = "mediatek,mt7622-ecc",
 		.data = &mtk_ecc_caps_mt7622,
+	}, {
+		.compatible = "mediatek,mt7986-ecc",
+		.data = &mtk_ecc_caps_mt7986,
 	},
 	{},
 };
-- 
2.25.1


  parent reply	other threads:[~2023-01-30  3:07 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-30  3:06 [RESEND PATCH v5 00/10] Add MediaTek MT7986 SPI NAND and ECC support Xiangsheng Hou
2023-01-30  3:06 ` [RESEND PATCH v5 01/10] spi: mtk-snfi: Change default page format to setup default setting Xiangsheng Hou
2023-01-30  3:06 ` [RESEND PATCH v5 02/10] spi: mtk-snfi: Add optional nfi_hclk which is needed for MT7986 Xiangsheng Hou
2023-01-30  3:06 ` Xiangsheng Hou [this message]
2023-01-30  3:06 ` [RESEND PATCH v5 04/10] dt-bindings: spi: mtk-snfi: Add compatible " Xiangsheng Hou
2023-01-30  3:06 ` [RESEND PATCH v5 05/10] spi: mtk-snfi: Add snfi sample delay and read latency adjustment Xiangsheng Hou
2023-01-30  3:06 ` [RESEND PATCH v5 06/10] dt-bindings: spi: mtk-snfi: Add read latch latency property Xiangsheng Hou
2023-01-30  3:06 ` [RESEND PATCH v5 07/10] dt-bindings: mtd: Split ECC engine with rawnand controller Xiangsheng Hou
2023-01-30 16:28   ` kernel test robot
2023-01-30 16:28     ` kernel test robot
2023-01-30 16:28     ` kernel test robot
2023-01-30  3:06 ` [RESEND PATCH v5 08/10] arm64: dts: mediatek: Fix existing NAND controller node name Xiangsheng Hou
2023-01-30  3:06 ` [RESEND PATCH v5 09/10] arm: " Xiangsheng Hou
2023-01-30  3:06 ` [RESEND PATCH v5 10/10] dt-bindings: mtd: mediatek,nand-ecc-engine: Add compatible for MT7986 Xiangsheng Hou
2023-01-30 16:11 ` [RESEND PATCH v5 00/10] Add MediaTek MT7986 SPI NAND and ECC support Miquel Raynal
2023-01-30 16:11   ` Miquel Raynal
2023-01-30 16:11   ` Miquel Raynal
2023-01-30 16:18   ` Mark Brown
2023-01-30 16:18     ` Mark Brown
2023-01-30 16:18     ` Mark Brown
2023-01-30 16:33     ` Miquel Raynal
2023-01-30 16:33       ` Miquel Raynal
2023-01-30 16:33       ` Miquel Raynal
2023-01-31  5:54       ` Xiangsheng Hou (侯祥胜)
2023-01-31  5:54         ` Xiangsheng Hou (侯祥胜)
2023-01-31  5:54         ` Xiangsheng Hou (侯祥胜)

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