From: Jonathan Cameron <Jonathan.Cameron@huawei.com> To: <qemu-devel@nongnu.org>, Michael Tsirkin <mst@redhat.com> Cc: "Ben Widawsky" <bwidawsk@kernel.org>, linux-cxl@vger.kernel.org, linuxarm@huawei.com, "Ira Weiny" <ira.weiny@intel.com>, "Gregory Price" <gourry.memverge@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org> Subject: [PATCH v3 09/10] qemu/uuid: Add UUID static initializer Date: Mon, 30 Jan 2023 14:37:04 +0000 [thread overview] Message-ID: <20230130143705.11758-10-Jonathan.Cameron@huawei.com> (raw) In-Reply-To: <20230130143705.11758-1-Jonathan.Cameron@huawei.com> From: Ira Weiny <ira.weiny@intel.com> UUID's are defined as network byte order fields. No static initializer was available for UUID's in their standard big endian format. Define a big endian initializer for UUIDs. Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> --- include/qemu/uuid.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/qemu/uuid.h b/include/qemu/uuid.h index 9925febfa5..dc40ee1fc9 100644 --- a/include/qemu/uuid.h +++ b/include/qemu/uuid.h @@ -61,6 +61,18 @@ typedef struct { (clock_seq_hi_and_reserved), (clock_seq_low), (node0), (node1), (node2),\ (node3), (node4), (node5) } +/* Normal (network byte order) UUID */ +#define UUID(time_low, time_mid, time_hi_and_version, \ + clock_seq_hi_and_reserved, clock_seq_low, node0, node1, node2, \ + node3, node4, node5) \ + { ((time_low) >> 24) & 0xff, ((time_low) >> 16) & 0xff, \ + ((time_low) >> 8) & 0xff, (time_low) & 0xff, \ + ((time_mid) >> 8) & 0xff, (time_mid) & 0xff, \ + ((time_hi_and_version) >> 8) & 0xff, (time_hi_and_version) & 0xff, \ + (clock_seq_hi_and_reserved), (clock_seq_low), \ + (node0), (node1), (node2), (node3), (node4), (node5) \ + } + #define UUID_FMT "%02hhx%02hhx%02hhx%02hhx-" \ "%02hhx%02hhx-%02hhx%02hhx-" \ "%02hhx%02hhx-" \ -- 2.37.2
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org> To: <qemu-devel@nongnu.org>, Michael Tsirkin <mst@redhat.com> Cc: "Ben Widawsky" <bwidawsk@kernel.org>, linux-cxl@vger.kernel.org, linuxarm@huawei.com, "Ira Weiny" <ira.weiny@intel.com>, "Gregory Price" <gourry.memverge@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org> Subject: [PATCH v3 09/10] qemu/uuid: Add UUID static initializer Date: Mon, 30 Jan 2023 14:37:04 +0000 [thread overview] Message-ID: <20230130143705.11758-10-Jonathan.Cameron@huawei.com> (raw) In-Reply-To: <20230130143705.11758-1-Jonathan.Cameron@huawei.com> From: Ira Weiny <ira.weiny@intel.com> UUID's are defined as network byte order fields. No static initializer was available for UUID's in their standard big endian format. Define a big endian initializer for UUIDs. Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> --- include/qemu/uuid.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/qemu/uuid.h b/include/qemu/uuid.h index 9925febfa5..dc40ee1fc9 100644 --- a/include/qemu/uuid.h +++ b/include/qemu/uuid.h @@ -61,6 +61,18 @@ typedef struct { (clock_seq_hi_and_reserved), (clock_seq_low), (node0), (node1), (node2),\ (node3), (node4), (node5) } +/* Normal (network byte order) UUID */ +#define UUID(time_low, time_mid, time_hi_and_version, \ + clock_seq_hi_and_reserved, clock_seq_low, node0, node1, node2, \ + node3, node4, node5) \ + { ((time_low) >> 24) & 0xff, ((time_low) >> 16) & 0xff, \ + ((time_low) >> 8) & 0xff, (time_low) & 0xff, \ + ((time_mid) >> 8) & 0xff, (time_mid) & 0xff, \ + ((time_hi_and_version) >> 8) & 0xff, (time_hi_and_version) & 0xff, \ + (clock_seq_hi_and_reserved), (clock_seq_low), \ + (node0), (node1), (node2), (node3), (node4), (node5) \ + } + #define UUID_FMT "%02hhx%02hhx%02hhx%02hhx-" \ "%02hhx%02hhx-%02hhx%02hhx-" \ "%02hhx%02hhx-" \ -- 2.37.2
next prev parent reply other threads:[~2023-01-30 14:41 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-30 14:36 [PATCH v3 00/10] hw/cxl: CXL emulation cleanups and minor fixes for upstream Jonathan Cameron 2023-01-30 14:36 ` Jonathan Cameron via 2023-01-30 14:36 ` [PATCH v3 01/10] hw/mem/cxl_type3: Improve error handling in realize() Jonathan Cameron 2023-01-30 14:36 ` Jonathan Cameron via 2023-01-30 14:36 ` [PATCH v3 02/10] hw/pci-bridge/cxl_downstream: Fix type naming mismatch Jonathan Cameron 2023-01-30 14:36 ` Jonathan Cameron via 2023-01-30 14:36 ` [PATCH v3 03/10] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL Jonathan Cameron 2023-01-30 14:36 ` Jonathan Cameron via 2023-01-30 14:36 ` [PATCH v3 04/10] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition Jonathan Cameron 2023-01-30 14:36 ` Jonathan Cameron via 2023-01-30 14:37 ` [PATCH v3 05/10] tests/acpi: Allow update of q35/DSDT.cxl Jonathan Cameron 2023-01-30 14:37 ` Jonathan Cameron via 2023-01-30 14:37 ` [PATCH v3 06/10] hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge Jonathan Cameron 2023-01-30 14:37 ` Jonathan Cameron via 2023-01-30 14:37 ` [PATCH v3 07/10] tests/acpi: Update q35/DSDT.cxl for removed duplicate _UID Jonathan Cameron 2023-01-30 14:37 ` Jonathan Cameron via 2023-01-30 14:37 ` [PATCH v3 08/10] qemu/bswap: Add const_le64() Jonathan Cameron 2023-01-30 14:37 ` Jonathan Cameron via 2023-01-30 14:37 ` Jonathan Cameron [this message] 2023-01-30 14:37 ` [PATCH v3 09/10] qemu/uuid: Add UUID static initializer Jonathan Cameron via 2023-01-30 14:37 ` [PATCH v3 10/10] hw/cxl/mailbox: Use new UUID network order define for cel_uuid Jonathan Cameron 2023-01-30 14:37 ` Jonathan Cameron via 2023-01-30 15:07 ` [PATCH v3 00/10] hw/cxl: CXL emulation cleanups and minor fixes for upstream Gregory Price
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