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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: sboyd@kernel.org
Cc: mturquette@baylibre.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	angelogioacchino.delregno@collabora.com,
	edward-jw.yang@mediatek.com, johnson.wang@mediatek.com,
	wenst@chromium.org, miles.chen@mediatek.com,
	chun-jie.chen@mediatek.com, rex-bc.chen@mediatek.com,
	jose.exposito89@gmail.com, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	kernel@collabora.com
Subject: [PATCH v3 0/7] MediaTek Frequency Hopping: MT6795/8173/92/95
Date: Mon,  6 Feb 2023 11:00:58 +0100	[thread overview]
Message-ID: <20230206100105.861720-1-angelogioacchino.delregno@collabora.com> (raw)

Changes in v3:
 - Added commit to export register/unregister/parse FHCTL functions
   to allow building clock drivers using FHCTL as modules

Changes in v2:
 - Rebased over v4 of my clock drivers cleanups series [1]

This series adds support for Frequency Hopping (FHCTL) on more MediaTek
SoCs, specifically, MT6795, MT8173, MT8192 and MT8195.

In order to support older platforms like MT6795 and MT8173 it was
necessary to add a new register layout that is ever-so-slightly
different from the one that was previously introduced for MT8186.

Since the new layout refers to older SoCs, the one valid for MT8186
and newer SoCs was renamed to be a "v2" layout, while the new one
for older chips gets the "v1" name.

Note: These commits won't change any behavior unless FHCTL gets
      explicitly enabled and configured in devicetrees.

[1]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=714059
AngeloGioacchino Del Regno (7):
  clk: mediatek: fhctl: Add support for older fhctl register layout
  clk: mediatek: clk-pllfh: Export register/unregister/parse functions
  dt-bindings: clock: mediatek,mt8186-fhctl: Support MT6795,
    MT8173/92/95
  clk: mediatek: mt6795: Add support for frequency hopping through FHCTL
  clk: mediatek: mt8173: Add support for frequency hopping through FHCTL
  clk: mediatek: mt8192: Add support for frequency hopping through FHCTL
  clk: mediatek: mt8195: Add support for frequency hopping through FHCTL

 .../bindings/clock/mediatek,mt8186-fhctl.yaml |  7 +-
 drivers/clk/mediatek/clk-fhctl.c              | 26 ++++++-
 drivers/clk/mediatek/clk-fhctl.h              |  9 ++-
 drivers/clk/mediatek/clk-mt6795-apmixedsys.c  | 63 ++++++++++++++++-
 drivers/clk/mediatek/clk-mt8173-apmixedsys.c  | 65 ++++++++++++++++-
 drivers/clk/mediatek/clk-mt8186-apmixedsys.c  |  2 +
 drivers/clk/mediatek/clk-mt8192.c             | 67 +++++++++++++++++-
 drivers/clk/mediatek/clk-mt8195-apmixedsys.c  | 69 ++++++++++++++++++-
 drivers/clk/mediatek/clk-pllfh.c              | 26 +++++--
 drivers/clk/mediatek/clk-pllfh.h              |  1 +
 10 files changed, 314 insertions(+), 21 deletions(-)

-- 
2.39.1


WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: sboyd@kernel.org
Cc: mturquette@baylibre.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	angelogioacchino.delregno@collabora.com,
	edward-jw.yang@mediatek.com, johnson.wang@mediatek.com,
	wenst@chromium.org, miles.chen@mediatek.com,
	chun-jie.chen@mediatek.com, rex-bc.chen@mediatek.com,
	jose.exposito89@gmail.com, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	kernel@collabora.com
Subject: [PATCH v3 0/7] MediaTek Frequency Hopping: MT6795/8173/92/95
Date: Mon,  6 Feb 2023 11:00:58 +0100	[thread overview]
Message-ID: <20230206100105.861720-1-angelogioacchino.delregno@collabora.com> (raw)

Changes in v3:
 - Added commit to export register/unregister/parse FHCTL functions
   to allow building clock drivers using FHCTL as modules

Changes in v2:
 - Rebased over v4 of my clock drivers cleanups series [1]

This series adds support for Frequency Hopping (FHCTL) on more MediaTek
SoCs, specifically, MT6795, MT8173, MT8192 and MT8195.

In order to support older platforms like MT6795 and MT8173 it was
necessary to add a new register layout that is ever-so-slightly
different from the one that was previously introduced for MT8186.

Since the new layout refers to older SoCs, the one valid for MT8186
and newer SoCs was renamed to be a "v2" layout, while the new one
for older chips gets the "v1" name.

Note: These commits won't change any behavior unless FHCTL gets
      explicitly enabled and configured in devicetrees.

[1]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=714059
AngeloGioacchino Del Regno (7):
  clk: mediatek: fhctl: Add support for older fhctl register layout
  clk: mediatek: clk-pllfh: Export register/unregister/parse functions
  dt-bindings: clock: mediatek,mt8186-fhctl: Support MT6795,
    MT8173/92/95
  clk: mediatek: mt6795: Add support for frequency hopping through FHCTL
  clk: mediatek: mt8173: Add support for frequency hopping through FHCTL
  clk: mediatek: mt8192: Add support for frequency hopping through FHCTL
  clk: mediatek: mt8195: Add support for frequency hopping through FHCTL

 .../bindings/clock/mediatek,mt8186-fhctl.yaml |  7 +-
 drivers/clk/mediatek/clk-fhctl.c              | 26 ++++++-
 drivers/clk/mediatek/clk-fhctl.h              |  9 ++-
 drivers/clk/mediatek/clk-mt6795-apmixedsys.c  | 63 ++++++++++++++++-
 drivers/clk/mediatek/clk-mt8173-apmixedsys.c  | 65 ++++++++++++++++-
 drivers/clk/mediatek/clk-mt8186-apmixedsys.c  |  2 +
 drivers/clk/mediatek/clk-mt8192.c             | 67 +++++++++++++++++-
 drivers/clk/mediatek/clk-mt8195-apmixedsys.c  | 69 ++++++++++++++++++-
 drivers/clk/mediatek/clk-pllfh.c              | 26 +++++--
 drivers/clk/mediatek/clk-pllfh.h              |  1 +
 10 files changed, 314 insertions(+), 21 deletions(-)

-- 
2.39.1


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

             reply	other threads:[~2023-02-06 10:02 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-06 10:00 AngeloGioacchino Del Regno [this message]
2023-02-06 10:00 ` [PATCH v3 0/7] MediaTek Frequency Hopping: MT6795/8173/92/95 AngeloGioacchino Del Regno
2023-02-06 10:00 ` [PATCH v3 1/7] clk: mediatek: fhctl: Add support for older fhctl register layout AngeloGioacchino Del Regno
2023-02-06 10:00   ` AngeloGioacchino Del Regno
2023-03-13 18:47   ` Stephen Boyd
2023-03-13 18:47     ` Stephen Boyd
2023-02-06 10:01 ` [PATCH v3 2/7] clk: mediatek: clk-pllfh: Export register/unregister/parse functions AngeloGioacchino Del Regno
2023-02-06 10:01   ` AngeloGioacchino Del Regno
2023-03-07  4:53   ` Chen-Yu Tsai
2023-03-07  4:53     ` Chen-Yu Tsai
2023-03-13 18:47   ` Stephen Boyd
2023-03-13 18:47     ` Stephen Boyd
2023-02-06 10:01 ` [PATCH v3 3/7] dt-bindings: clock: mediatek,mt8186-fhctl: Support MT6795, MT8173/92/95 AngeloGioacchino Del Regno
2023-02-06 10:01   ` AngeloGioacchino Del Regno
2023-02-07 20:39   ` Rob Herring
2023-02-07 20:39     ` Rob Herring
2023-03-13 18:47   ` Stephen Boyd
2023-03-13 18:47     ` Stephen Boyd
2023-02-06 10:01 ` [PATCH v3 4/7] clk: mediatek: mt6795: Add support for frequency hopping through FHCTL AngeloGioacchino Del Regno
2023-02-06 10:01   ` AngeloGioacchino Del Regno
2023-03-13 18:47   ` Stephen Boyd
2023-03-13 18:47     ` Stephen Boyd
2023-02-06 10:01 ` [PATCH v3 5/7] clk: mediatek: mt8173: " AngeloGioacchino Del Regno
2023-02-06 10:01   ` AngeloGioacchino Del Regno
2023-03-13 18:47   ` Stephen Boyd
2023-03-13 18:47     ` Stephen Boyd
2023-02-06 10:01 ` [PATCH v3 6/7] clk: mediatek: mt8192: " AngeloGioacchino Del Regno
2023-02-06 10:01   ` AngeloGioacchino Del Regno
2023-03-13 18:47   ` Stephen Boyd
2023-03-13 18:47     ` Stephen Boyd
2023-02-06 10:01 ` [PATCH v3 7/7] clk: mediatek: mt8195: " AngeloGioacchino Del Regno
2023-02-06 10:01   ` AngeloGioacchino Del Regno
2023-03-07  4:43   ` Chen-Yu Tsai
2023-03-07  4:43     ` Chen-Yu Tsai
2023-03-07  9:27     ` AngeloGioacchino Del Regno
2023-03-07  9:27       ` AngeloGioacchino Del Regno
2023-03-07  9:29       ` Chen-Yu Tsai
2023-03-07  9:29         ` Chen-Yu Tsai
2023-03-07  9:38         ` AngeloGioacchino Del Regno
2023-03-07  9:38           ` AngeloGioacchino Del Regno
2023-03-13 18:47   ` Stephen Boyd
2023-03-13 18:47     ` Stephen Boyd
2023-03-09  4:26 ` [PATCH v3 0/7] MediaTek Frequency Hopping: MT6795/8173/92/95 Chen-Yu Tsai
2023-03-09  4:26   ` Chen-Yu Tsai

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