From: Walker Chen <walker.chen@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>, Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor@kernel.org>, "Palmer Dabbelt" <palmer@dabbelt.com>, Emil Renner Berthing <kernel@esmil.dk>, "Walker Chen" <walker.chen@starfivetech.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH v1 3/3] riscv: dts: starfive: add dma controller node Date: Mon, 6 Feb 2023 19:38:11 +0800 [thread overview] Message-ID: <20230206113811.23133-4-walker.chen@starfivetech.com> (raw) In-Reply-To: <20230206113811.23133-1-walker.chen@starfivetech.com> Adding the dma controller node for the Starfive JH7110 SoC. Signed-off-by: Walker Chen <walker.chen@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index cfbaff4ea64b..1628c0f33fab 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -412,6 +412,26 @@ #gpio-cells = <2>; }; + dma: dma-controller@16050000 { + compatible = "starfive,axi-dma"; + reg = <0x0 0x16050000 0x0 0x10000>; + clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>, + <&stgcrg JH7110_STGCLK_DMA1P_AHB>; + clock-names = "core-clk", "cfgr-clk"; + resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>, + <&stgcrg JH7110_STGRST_DMA1P_AHB>; + reset-names = "axi-rst", "ahb-rst"; + interrupts = <73>; + #dma-cells = <1>; + dma-channels = <4>; + snps,dma-masters = <1>; + snps,data-width = <3>; + snps,num-hs-if = <56>; + snps,block-size = <65536 65536 65536 65536>; + snps,priority = <0 1 2 3>; + snps,axi-max-burst-len = <16>; + }; + aoncrg: clock-controller@17000000 { compatible = "starfive,jh7110-aoncrg"; reg = <0x0 0x17000000 0x0 0x10000>; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Walker Chen <walker.chen@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>, Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor@kernel.org>, "Palmer Dabbelt" <palmer@dabbelt.com>, Emil Renner Berthing <kernel@esmil.dk>, "Walker Chen" <walker.chen@starfivetech.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH v1 3/3] riscv: dts: starfive: add dma controller node Date: Mon, 6 Feb 2023 19:38:11 +0800 [thread overview] Message-ID: <20230206113811.23133-4-walker.chen@starfivetech.com> (raw) In-Reply-To: <20230206113811.23133-1-walker.chen@starfivetech.com> Adding the dma controller node for the Starfive JH7110 SoC. Signed-off-by: Walker Chen <walker.chen@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index cfbaff4ea64b..1628c0f33fab 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -412,6 +412,26 @@ #gpio-cells = <2>; }; + dma: dma-controller@16050000 { + compatible = "starfive,axi-dma"; + reg = <0x0 0x16050000 0x0 0x10000>; + clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>, + <&stgcrg JH7110_STGCLK_DMA1P_AHB>; + clock-names = "core-clk", "cfgr-clk"; + resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>, + <&stgcrg JH7110_STGRST_DMA1P_AHB>; + reset-names = "axi-rst", "ahb-rst"; + interrupts = <73>; + #dma-cells = <1>; + dma-channels = <4>; + snps,dma-masters = <1>; + snps,data-width = <3>; + snps,num-hs-if = <56>; + snps,block-size = <65536 65536 65536 65536>; + snps,priority = <0 1 2 3>; + snps,axi-max-burst-len = <16>; + }; + aoncrg: clock-controller@17000000 { compatible = "starfive,jh7110-aoncrg"; reg = <0x0 0x17000000 0x0 0x10000>; -- 2.17.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-02-06 11:38 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-02-06 11:38 [PATCH v1 0/3] Add DMA driver for StarFive JH7110 SoC Walker Chen 2023-02-06 11:38 ` Walker Chen 2023-02-06 11:38 ` [PATCH v1 1/3] dt-bindings: dma: snps,dw-axi-dmac: Update resets and add snps,num-hs-if Walker Chen 2023-02-06 11:38 ` Walker Chen 2023-02-07 20:58 ` Rob Herring 2023-02-07 20:58 ` Rob Herring 2023-02-13 10:08 ` Walker Chen 2023-02-13 10:08 ` Walker Chen 2023-02-06 11:38 ` [PATCH v1 2/3] dma: dw-axi-dmac: Add support for StarFive DMA Walker Chen 2023-02-06 11:38 ` Walker Chen 2023-02-10 8:59 ` Vinod Koul 2023-02-10 8:59 ` Vinod Koul 2023-02-13 13:08 ` Walker Chen 2023-02-13 13:08 ` Walker Chen 2023-02-15 1:22 ` Walker Chen 2023-02-15 1:22 ` Walker Chen 2023-02-06 11:38 ` Walker Chen [this message] 2023-02-06 11:38 ` [PATCH v1 3/3] riscv: dts: starfive: add dma controller node Walker Chen
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