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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Stephen Boyd <swboyd@chromium.org>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Bjorn Andersson <andersson@kernel.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org,
	Yassine Oudjana <y.oudjana@protonmail.com>,
	Jami Kettunen <jami.kettunen@protonmail.com>
Subject: [PATCH 2/4] drm/msm/a5xx: fix highest bank bit for a530
Date: Tue, 14 Feb 2023 05:09:54 +0300	[thread overview]
Message-ID: <20230214020956.164473-3-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230214020956.164473-1-dmitry.baryshkov@linaro.org>

A530 has highest bank bit equal to 15 (like A540). Fix values written to
REG_A5XX_RB_MODE_CNTL and REG_A5XX_TPL1_MODE_CNTL registers.

Fixes: 1d832ab30ce6 ("drm/msm/a5xx: Add support for Adreno 508, 509, 512 GPUs")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 8b2df12d8681..047c5e8c87ff 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -806,7 +806,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
 	gpu_write(gpu, REG_A5XX_RBBM_AHB_CNTL2, 0x0000003F);
 
 	/* Set the highest bank bit */
-	if (adreno_is_a540(adreno_gpu))
+	if (adreno_is_a540(adreno_gpu) || adreno_is_a530(adreno_gpu))
 		regbit = 2;
 	else
 		regbit = 1;
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: freedreno@lists.freedesktop.org,
	Yassine Oudjana <y.oudjana@protonmail.com>,
	linux-arm-msm@vger.kernel.org,
	Bjorn Andersson <andersson@kernel.org>,
	dri-devel@lists.freedesktop.org,
	Stephen Boyd <swboyd@chromium.org>,
	Jami Kettunen <jami.kettunen@protonmail.com>
Subject: [PATCH 2/4] drm/msm/a5xx: fix highest bank bit for a530
Date: Tue, 14 Feb 2023 05:09:54 +0300	[thread overview]
Message-ID: <20230214020956.164473-3-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230214020956.164473-1-dmitry.baryshkov@linaro.org>

A530 has highest bank bit equal to 15 (like A540). Fix values written to
REG_A5XX_RB_MODE_CNTL and REG_A5XX_TPL1_MODE_CNTL registers.

Fixes: 1d832ab30ce6 ("drm/msm/a5xx: Add support for Adreno 508, 509, 512 GPUs")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 8b2df12d8681..047c5e8c87ff 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -806,7 +806,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
 	gpu_write(gpu, REG_A5XX_RBBM_AHB_CNTL2, 0x0000003F);
 
 	/* Set the highest bank bit */
-	if (adreno_is_a540(adreno_gpu))
+	if (adreno_is_a540(adreno_gpu) || adreno_is_a530(adreno_gpu))
 		regbit = 2;
 	else
 		regbit = 1;
-- 
2.30.2


  parent reply	other threads:[~2023-02-14  2:10 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-14  2:09 [PATCH 0/4] drm/msm/a5xx: make it work with the latest Mesa Dmitry Baryshkov
2023-02-14  2:09 ` Dmitry Baryshkov
2023-02-14  2:09 ` [PATCH 1/4] drm/msm/a5xx: fix setting of the CP_PREEMPT_ENABLE_LOCAL register Dmitry Baryshkov
2023-02-14  2:09   ` Dmitry Baryshkov
2023-02-14  2:09 ` Dmitry Baryshkov [this message]
2023-02-14  2:09   ` [PATCH 2/4] drm/msm/a5xx: fix highest bank bit for a530 Dmitry Baryshkov
2023-02-14  2:09 ` [PATCH 3/4] drm/msm/a5xx: fix the emptyness check in the preempt code Dmitry Baryshkov
2023-02-14  2:09   ` Dmitry Baryshkov
2023-02-14  2:09 ` [PATCH 4/4] drm/msm/a5xx: fix context faults during ring switch Dmitry Baryshkov
2023-02-14  2:09   ` Dmitry Baryshkov
2023-02-14 17:35   ` Rob Clark
2023-02-14 17:35     ` Rob Clark
2023-02-14  3:51 ` [PATCH 0/4] drm/msm/a5xx: make it work with the latest Mesa Yassine Oudjana
2023-02-14  3:51   ` Yassine Oudjana

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