From: Lukasz Majewski <lukma@denx.de>
To: Andrew Lunn <andrew@lunn.ch>, Vladimir Oltean <olteanv@gmail.com>,
Russell King <linux@armlinux.org.uk>
Cc: Eric Dumazet <edumazet@google.com>,
Florian Fainelli <f.fainelli@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Alexander Duyck <alexander.duyck@gmail.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Lukasz Majewski <lukma@denx.de>
Subject: [PATCH 1/7] dsa: marvell: Provide per device information about max frame size
Date: Thu, 9 Mar 2023 13:54:15 +0100 [thread overview]
Message-ID: <20230309125421.3900962-2-lukma@denx.de> (raw)
In-Reply-To: <20230309125421.3900962-1-lukma@denx.de>
Different Marvell DSA switches support different size of max frame
bytes to be sent. This value corresponds to the memory allocated
in switch to store single frame.
For example mv88e6185 supports max 1632 bytes, which is now in-driver
standard value. On the other hand - mv88e6250 supports 2048 bytes.
To be more interesting - devices supporting jumbo frames - use yet
another value (10240 bytes)
As this value is internal and may be different for each switch IC,
new entry in struct mv88e6xxx_info has been added to store it.
This commit doesn't change the code functionality - it just provides
the max frame size value explicitly - up till now it has been
assigned depending on the callback provided by the switch driver
(e.g. .set_max_frame_size, .port_set_jumbo_size).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
---
Changes for v2:
- Define max_frame_size with default value of 1632 bytes,
- Set proper value for the mv88e6250 switch SoC (linkstreet) family
Changes for v3:
- Add default value for 1632B of the max frame size (to avoid problems
with not defined values)
Changes for v4:
- Rework the mv88e6xxx_get_max_mtu() by using per device defined
max_frame_size value
- Add WARN_ON_ONCE() when max_frame_size is not defined
- Add description for the new 'max_frame_size' member of mv88e6xxx_info
Changes for v5:
- Move some code fragments (like get_mtu callback changes) to separate
patches
---
drivers/net/dsa/mv88e6xxx/chip.c | 31 +++++++++++++++++++++++++++++++
drivers/net/dsa/mv88e6xxx/chip.h | 6 ++++++
2 files changed, 37 insertions(+)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 0a5d6c7bb128..c097a0b19ba6 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -5626,6 +5626,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 1522,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5648,6 +5649,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_ports = 11,
.num_internal_phys = 0,
.max_vid = 4095,
+ .max_frame_size = 1632,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5669,6 +5671,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 8,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 1632,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5693,6 +5696,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 1632,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5716,6 +5720,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_ports = 8,
.num_internal_phys = 0,
.max_vid = 4095,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5738,6 +5743,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 11,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x10,
.global1_addr = 0x1b,
@@ -5762,6 +5768,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 1632,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5787,6 +5794,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 0,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 1632,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5811,6 +5819,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5836,6 +5845,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 15,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5860,6 +5870,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5885,6 +5896,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 15,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5908,6 +5920,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_ports = 10,
.num_internal_phys = 0,
.max_vid = 4095,
+ .max_frame_size = 1632,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5931,6 +5944,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 16,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5955,6 +5969,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 16,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 1522,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -5978,6 +5993,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 9,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 1522,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6001,6 +6017,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 9,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 1522,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6024,6 +6041,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 9,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 1522,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6051,6 +6069,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 2,
.invalid_port_mask = BIT(2) | BIT(3) | BIT(4),
.max_vid = 4095,
+ .max_frame_size = 2048,
.port_base_addr = 0x08,
.phy_base_addr = 0x00,
.global1_addr = 0x0f,
@@ -6075,6 +6094,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 15,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6098,6 +6118,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_ports = 7,
.num_internal_phys = 5,
.max_vid = 4095,
+ .max_frame_size = 2048,
.port_base_addr = 0x08,
.phy_base_addr = 0x00,
.global1_addr = 0x0f,
@@ -6121,6 +6142,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 16,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 1522,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6145,6 +6167,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.num_gpio = 15,
.max_vid = 4095,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6170,6 +6193,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.num_gpio = 15,
.max_vid = 4095,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6195,6 +6219,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 11,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x10,
.global1_addr = 0x1b,
@@ -6220,6 +6245,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6244,6 +6270,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 5,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6269,6 +6296,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 15,
.max_vid = 4095,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x10,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6294,6 +6322,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 16,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6319,6 +6348,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_gpio = 16,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
@@ -6343,6 +6373,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
.num_internal_phys = 9,
.max_vid = 8191,
.max_sid = 63,
+ .max_frame_size = 10240,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
.global1_addr = 0x1b,
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
index da6e1339f809..e2b88f1f8376 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -132,6 +132,12 @@ struct mv88e6xxx_info {
unsigned int num_gpio;
unsigned int max_vid;
unsigned int max_sid;
+
+ /* Max Frame Size.
+ * This value corresponds to the memory allocated in switch internal
+ * memory to store single frame.
+ */
+ unsigned int max_frame_size;
unsigned int port_base_addr;
unsigned int phy_base_addr;
unsigned int global1_addr;
--
2.20.1
next prev parent reply other threads:[~2023-03-09 12:55 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-09 12:54 [PATCH 0/7] dsa: marvell: Add support for mv88e6071 and 6020 switches Lukasz Majewski
2023-03-09 12:54 ` Lukasz Majewski [this message]
2023-03-10 12:02 ` [PATCH 1/7] dsa: marvell: Provide per device information about max frame size Vladimir Oltean
2023-03-10 12:25 ` Russell King (Oracle)
2023-03-10 13:04 ` Vladimir Oltean
2023-03-10 13:06 ` Vladimir Oltean
2023-03-10 13:17 ` Lukasz Majewski
2023-03-10 13:36 ` Vladimir Oltean
2023-03-10 14:10 ` Lukasz Majewski
2023-03-10 15:45 ` Vladimir Oltean
2023-03-10 16:12 ` Andrew Lunn
2023-03-12 15:55 ` Lukasz Majewski
2023-03-13 15:01 ` Vladimir Oltean
2023-03-10 14:04 ` Russell King (Oracle)
2023-03-09 12:54 ` [PATCH 2/7] net: dsa: mv88e6xxx: add support for MV88E6020 switch Lukasz Majewski
2023-03-10 14:23 ` Vladimir Oltean
2023-03-09 12:54 ` [PATCH 3/7] net: dsa: mv88e6xxx: add support for MV88E6071 switch Lukasz Majewski
2023-03-09 12:54 ` [PATCH 4/7] dsa: marvell: Define .set_max_frame_size() function for mv88e6250 SoC family Lukasz Majewski
2023-03-09 12:54 ` [PATCH 5/7] dsa: marvell: Add helper function to validate the max_frame_size variable Lukasz Majewski
2023-03-09 13:21 ` Russell King (Oracle)
2023-03-09 13:26 ` Russell King (Oracle)
2023-03-09 13:47 ` Lukasz Majewski
2023-03-09 13:52 ` Vladimir Oltean
2023-03-09 13:57 ` Lukasz Majewski
2023-03-09 12:54 ` [PATCH 6/7] dsa: marvell: Correct value of max_frame_size variable after validation Lukasz Majewski
2023-03-09 14:05 ` Russell King (Oracle)
2023-03-09 14:43 ` Lukasz Majewski
2023-03-09 15:31 ` Russell King (Oracle)
2023-03-10 9:47 ` Lukasz Majewski
2023-03-09 15:42 ` Andrew Lunn
2023-03-10 11:53 ` Lukasz Majewski
2023-03-10 12:06 ` Russell King (Oracle)
2023-03-10 13:19 ` Lukasz Majewski
2023-03-10 15:25 ` Vladimir Oltean
2023-03-09 12:54 ` [PATCH 7/7] dsa: marvell: Modify get max MTU callback to use per switch provided value Lukasz Majewski
2023-04-03 11:55 ` [PATCH 0/7] dsa: marvell: Add support for mv88e6071 and 6020 switches Vladimir Oltean
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230309125421.3900962-2-lukma@denx.de \
--to=lukma@denx.de \
--cc=alexander.duyck@gmail.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=f.fainelli@gmail.com \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=netdev@vger.kernel.org \
--cc=olteanv@gmail.com \
--cc=pabeni@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.