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From: haibo.chen@nxp.com
To: broonie@kernel.org, han.xu@nxp.com
Cc: linux-spi@vger.kernel.org, yogeshgaur.83@gmail.com,
	haibo.chen@nxp.com, linux-imx@nxp.com
Subject: [PATCH 1/2] spi: spi-nxp-fspi: correct the comment for the DLL config
Date: Wed, 22 Mar 2023 17:04:50 +0800	[thread overview]
Message-ID: <20230322090451.3179431-1-haibo.chen@nxp.com> (raw)

From: Haibo Chen <haibo.chen@nxp.com>

Current DLL config is just to use the default setting, this means
enable the DLL override mode, and use 1 fixed delay cell in the
DLL delay chain, not means "reset" the DLL, so correct this to
avoid confuse.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 drivers/spi/spi-nxp-fspi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 76168cc1e00d..6735c22b9137 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -997,7 +997,11 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
 	/* Disable the module */
 	fspi_writel(f, FSPI_MCR0_MDIS, base + FSPI_MCR0);
 
-	/* Reset the DLL register to default value */
+	/*
+	 * Config the DLL register to default value, enable the slave clock delay
+	 * line delay cell override mode, and use 1 fixed delay cell in DLL delay
+	 * chain, this is the suggested setting when clock rate < 100MHz.
+	 */
 	fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
 	fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
 
-- 
2.34.1


             reply	other threads:[~2023-03-22  9:03 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-22  9:04 haibo.chen [this message]
2023-03-22  9:04 ` [PATCH 2/2] spi: spi-nxp-fspi: use DLL calibration when clock rate > 100MHz haibo.chen
2023-03-23  1:52   ` han.xu
2023-03-22 18:47 ` [PATCH 1/2] spi: spi-nxp-fspi: correct the comment for the DLL config Mark Brown

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