From: Po-Wen Kao <powen.kao@mediatek.com> To: <linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, Alim Akhtar <alim.akhtar@samsung.com>, Avri Altman <avri.altman@wdc.com>, Bart Van Assche <bvanassche@acm.org>, "James E.J. Bottomley" <jejb@linux.ibm.com>, "Martin K. Petersen" <martin.petersen@oracle.com>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: <wsd_upstream@mediatek.com>, <peter.wang@mediatek.com>, <stanley.chu@mediatek.com>, <powen.kao@mediatek.com>, <alice.chao@mediatek.com>, <naomi.chu@mediatek.com>, <chun-hung.wu@mediatek.com>, <cc.chou@mediatek.com>, <eddie.huang@mediatek.com>, <mason.zhang@mediatek.com>, <chaotian.jing@mediatek.com>, <jiajie.hao@mediatek.com> Subject: [PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR Date: Tue, 28 Mar 2023 18:37:52 +0800 [thread overview] Message-ID: <20230328103801.11198-1-powen.kao@mediatek.com> (raw) Quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR is introduced for plaforms that implement different interrupt topology from UFSHCI 4.0 spec. Some platform raise per hw queue interrupt in addition to CQES (traditional) when ESI is disabled. Enable this quirk will disable CQES and use only per hw queue interrupt. Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> --- drivers/ufs/core/ufshcd.c | 8 ++++++-- include/ufs/ufshcd.h | 7 +++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index acae4e194ec4..1e1271aca1f2 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -8493,11 +8493,15 @@ static int ufshcd_alloc_mcq(struct ufs_hba *hba) static void ufshcd_config_mcq(struct ufs_hba *hba) { int ret; - + u32 intrs; ret = ufshcd_mcq_vops_config_esi(hba); + dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : ""); - ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS); + intrs = (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR) ? + (UFSHCD_ENABLE_MCQ_INTRS & ~MCQ_CQ_EVENT_STATUS) : UFSHCD_ENABLE_MCQ_INTRS; + + ufshcd_enable_intr(hba, intrs); ufshcd_mcq_make_queues_operational(hba); ufshcd_mcq_config_mac(hba, hba->nutrs); diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 25aab8ec4f86..7bb9e1a17154 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -616,6 +616,13 @@ enum ufshcd_quirks { * to reinit the device after switching to maximum gear. */ UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH = 1 << 19, + + /* + * Some platform raises interrupt (per queue) in addition to + * CQES (traditional) when ESI is disabled. + * Enable this quirk will disable CQES and use per queue interrupt. + */ + UFSHCD_QUIRK_MCQ_BROKEN_INTR = 1 << 20, }; enum ufshcd_caps { -- 2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Po-Wen Kao <powen.kao@mediatek.com> To: <linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, Alim Akhtar <alim.akhtar@samsung.com>, Avri Altman <avri.altman@wdc.com>, Bart Van Assche <bvanassche@acm.org>, "James E.J. Bottomley" <jejb@linux.ibm.com>, "Martin K. Petersen" <martin.petersen@oracle.com>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: <wsd_upstream@mediatek.com>, <peter.wang@mediatek.com>, <stanley.chu@mediatek.com>, <powen.kao@mediatek.com>, <alice.chao@mediatek.com>, <naomi.chu@mediatek.com>, <chun-hung.wu@mediatek.com>, <cc.chou@mediatek.com>, <eddie.huang@mediatek.com>, <mason.zhang@mediatek.com>, <chaotian.jing@mediatek.com>, <jiajie.hao@mediatek.com> Subject: [PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR Date: Tue, 28 Mar 2023 18:37:52 +0800 [thread overview] Message-ID: <20230328103801.11198-1-powen.kao@mediatek.com> (raw) Quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR is introduced for plaforms that implement different interrupt topology from UFSHCI 4.0 spec. Some platform raise per hw queue interrupt in addition to CQES (traditional) when ESI is disabled. Enable this quirk will disable CQES and use only per hw queue interrupt. Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> --- drivers/ufs/core/ufshcd.c | 8 ++++++-- include/ufs/ufshcd.h | 7 +++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index acae4e194ec4..1e1271aca1f2 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -8493,11 +8493,15 @@ static int ufshcd_alloc_mcq(struct ufs_hba *hba) static void ufshcd_config_mcq(struct ufs_hba *hba) { int ret; - + u32 intrs; ret = ufshcd_mcq_vops_config_esi(hba); + dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : ""); - ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS); + intrs = (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR) ? + (UFSHCD_ENABLE_MCQ_INTRS & ~MCQ_CQ_EVENT_STATUS) : UFSHCD_ENABLE_MCQ_INTRS; + + ufshcd_enable_intr(hba, intrs); ufshcd_mcq_make_queues_operational(hba); ufshcd_mcq_config_mac(hba, hba->nutrs); diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 25aab8ec4f86..7bb9e1a17154 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -616,6 +616,13 @@ enum ufshcd_quirks { * to reinit the device after switching to maximum gear. */ UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH = 1 << 19, + + /* + * Some platform raises interrupt (per queue) in addition to + * CQES (traditional) when ESI is disabled. + * Enable this quirk will disable CQES and use per queue interrupt. + */ + UFSHCD_QUIRK_MCQ_BROKEN_INTR = 1 << 20, }; enum ufshcd_caps { -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2023-03-28 10:38 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-28 10:37 Po-Wen Kao [this message] 2023-03-28 10:37 ` [PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR Po-Wen Kao 2023-03-28 10:37 ` [PATCH 2/2] scsi: ufs: ufs-mediatek: Add UFSHCD_QUIRK_MCQ_BROKEN_INTR quirk Po-Wen Kao 2023-03-28 10:37 ` Po-Wen Kao 2023-03-29 1:32 ` Stanley Chu 2023-03-29 1:32 ` Stanley Chu 2023-03-29 3:08 ` Bart Van Assche 2023-03-29 3:08 ` Bart Van Assche 2023-03-29 1:32 ` [PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR Stanley Chu 2023-03-29 1:32 ` Stanley Chu 2023-03-29 3:07 ` Bart Van Assche 2023-03-29 3:07 ` Bart Van Assche
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