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From: fei.yang@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
	Chris Wilson <chris.p.wilson@linux.intel.com>,
	Fei Yang <fei.yang@intel.com>,
	dri-devel@lists.freedesktop.org,
	Andi Shyti <andi.shyti@linux.intel.com>
Subject: [PATCH 7/8] drm/i915: making mtl pte encode generic for gen12
Date: Fri,  7 Apr 2023 00:12:35 -0700	[thread overview]
Message-ID: <20230407071236.1960642-8-fei.yang@intel.com> (raw)
In-Reply-To: <20230407071236.1960642-1-fei.yang@intel.com>

From: Fei Yang <fei.yang@intel.com>

PTE encode is platform dependent. After replacing cache_level with
pat_index, the newly introduced mtl_pte_encode is actually generic
for all gen12 platforms, thus rename it to gen12_pte_encode and
apply it to all gen12 platforms.

Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
---
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f76ec2cb29ef..e393e20b5894 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -60,7 +60,7 @@ static u64 gen8_pte_encode(dma_addr_t addr,
 	return pte;
 }
 
-static u64 mtl_pte_encode(dma_addr_t addr,
+static u64 gen12_pte_encode(dma_addr_t addr,
 			  unsigned int pat_index,
 			  u32 flags)
 {
@@ -999,8 +999,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
 	 */
 	ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
 
-	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
-		ppgtt->vm.pte_encode = mtl_pte_encode;
+	if (GRAPHICS_VER(gt->i915) >= 12)
+		ppgtt->vm.pte_encode = gen12_pte_encode;
 	else
 		ppgtt->vm.pte_encode = gen8_pte_encode;
 
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: fei.yang@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
	Chris Wilson <chris.p.wilson@linux.intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 7/8] drm/i915: making mtl pte encode generic for gen12
Date: Fri,  7 Apr 2023 00:12:35 -0700	[thread overview]
Message-ID: <20230407071236.1960642-8-fei.yang@intel.com> (raw)
In-Reply-To: <20230407071236.1960642-1-fei.yang@intel.com>

From: Fei Yang <fei.yang@intel.com>

PTE encode is platform dependent. After replacing cache_level with
pat_index, the newly introduced mtl_pte_encode is actually generic
for all gen12 platforms, thus rename it to gen12_pte_encode and
apply it to all gen12 platforms.

Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
---
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f76ec2cb29ef..e393e20b5894 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -60,7 +60,7 @@ static u64 gen8_pte_encode(dma_addr_t addr,
 	return pte;
 }
 
-static u64 mtl_pte_encode(dma_addr_t addr,
+static u64 gen12_pte_encode(dma_addr_t addr,
 			  unsigned int pat_index,
 			  u32 flags)
 {
@@ -999,8 +999,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
 	 */
 	ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
 
-	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
-		ppgtt->vm.pte_encode = mtl_pte_encode;
+	if (GRAPHICS_VER(gt->i915) >= 12)
+		ppgtt->vm.pte_encode = gen12_pte_encode;
 	else
 		ppgtt->vm.pte_encode = gen8_pte_encode;
 
-- 
2.25.1


  parent reply	other threads:[~2023-04-07  7:11 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-07  7:12 [PATCH 0/8] drm/i915/mtl: Define MOCS and PAT tables for MTL fei.yang
2023-04-07  7:12 ` [Intel-gfx] " fei.yang
2023-04-07  7:12 ` [PATCH 1/8] " fei.yang
2023-04-07  7:12   ` [Intel-gfx] " fei.yang
2023-04-10 16:34   ` Matt Roper
2023-04-11  3:55     ` Yang, Fei
2023-04-11  3:55       ` Yang, Fei
2023-04-11 19:28       ` Matt Roper
2023-04-11 21:54         ` Yang, Fei
2023-04-11 21:54           ` Yang, Fei
2023-04-07  7:12 ` [PATCH 2/8] drm/i915/mtl: enforce mtl PTE encode fei.yang
2023-04-07  7:12   ` [Intel-gfx] " fei.yang
2023-04-07  7:12 ` [PATCH 3/8] drm/i915/mtl: workaround coherency issue for Media fei.yang
2023-04-07  7:12   ` [Intel-gfx] " fei.yang
2023-04-07  7:12 ` [PATCH 4/8] drm/i915/mtl: end support for set caching ioctl fei.yang
2023-04-07  7:12   ` [Intel-gfx] " fei.yang
2023-04-07  7:12 ` [PATCH 5/8] drm/i915: preparation for using PAT index fei.yang
2023-04-07  7:12   ` [Intel-gfx] " fei.yang
2023-04-07  7:12 ` [PATCH 6/8] drm/i915: use pat_index instead of cache_level fei.yang
2023-04-07  7:12   ` [Intel-gfx] " fei.yang
2023-04-07  7:12 ` fei.yang [this message]
2023-04-07  7:12   ` [Intel-gfx] [PATCH 7/8] drm/i915: making mtl pte encode generic for gen12 fei.yang
2023-04-07  7:12 ` [PATCH 8/8] drm/i915: Allow user to set cache at BO creation fei.yang
2023-04-07  7:12   ` [Intel-gfx] " fei.yang
2023-04-07  7:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Define MOCS and PAT tables for MTL (rev2) Patchwork
2023-04-07  7:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-07  7:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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