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From: Mason Huo <mason.huo@starfivetech.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	"Rob Herring" <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Shengyu Qu <wiagn233@outlook.com>, <linux-pm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Mason Huo <mason.huo@starfivetech.com>
Subject: [PATCH v2 1/3] riscv: dts: starfive: Enable axp15060 pmic for cpufreq
Date: Mon, 17 Apr 2023 14:39:40 +0800	[thread overview]
Message-ID: <20230417063942.3141-2-mason.huo@starfivetech.com> (raw)
In-Reply-To: <20230417063942.3141-1-mason.huo@starfivetech.com>

The VisionFive 2 board has an embedded pmic axp15060,
which supports the cpu DVFS through the dcdc2 regulator.
This patch enables axp15060 pmic and configs the dcdc2.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
---
 .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 2a6d81609284..cca1c8040801 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -114,6 +114,20 @@ &i2c5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c5_pins>;
 	status = "okay";
+
+	axp15060: pmic@36 {
+		compatible = "x-powers,axp15060";
+		reg = <0x36>;
+
+		regulators {
+			vdd_cpu: dcdc2 {
+				regulator-always-on;
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1540000>;
+				regulator-name = "vdd-cpu";
+			};
+		};
+	};
 };
 
 &i2c6 {
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Mason Huo <mason.huo@starfivetech.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	"Rob Herring" <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Shengyu Qu <wiagn233@outlook.com>, <linux-pm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Mason Huo <mason.huo@starfivetech.com>
Subject: [PATCH v2 1/3] riscv: dts: starfive: Enable axp15060 pmic for cpufreq
Date: Mon, 17 Apr 2023 14:39:40 +0800	[thread overview]
Message-ID: <20230417063942.3141-2-mason.huo@starfivetech.com> (raw)
In-Reply-To: <20230417063942.3141-1-mason.huo@starfivetech.com>

The VisionFive 2 board has an embedded pmic axp15060,
which supports the cpu DVFS through the dcdc2 regulator.
This patch enables axp15060 pmic and configs the dcdc2.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
---
 .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 2a6d81609284..cca1c8040801 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -114,6 +114,20 @@ &i2c5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c5_pins>;
 	status = "okay";
+
+	axp15060: pmic@36 {
+		compatible = "x-powers,axp15060";
+		reg = <0x36>;
+
+		regulators {
+			vdd_cpu: dcdc2 {
+				regulator-always-on;
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1540000>;
+				regulator-name = "vdd-cpu";
+			};
+		};
+	};
 };
 
 &i2c6 {
-- 
2.39.2


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  reply	other threads:[~2023-04-17  6:40 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-17  6:39 [PATCH v2 0/3] Add JH7110 cpufreq support Mason Huo
2023-04-17  6:39 ` Mason Huo
2023-04-17  6:39 ` Mason Huo [this message]
2023-04-17  6:39   ` [PATCH v2 1/3] riscv: dts: starfive: Enable axp15060 pmic for cpufreq Mason Huo
2023-04-17  6:39 ` [PATCH v2 2/3] cpufreq: dt-platdev: Add JH7110 SOC to the allowlist Mason Huo
2023-04-17  6:39   ` Mason Huo
2023-04-17  6:39 ` [PATCH v2 3/3] riscv: dts: starfive: Add cpu scaling for JH7110 SoC Mason Huo
2023-04-17  6:39   ` Mason Huo
2023-04-18 17:28   ` Conor Dooley
2023-04-18 17:28     ` Conor Dooley
2023-04-20  7:10     ` Mason Huo
2023-04-20  7:10       ` Mason Huo

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