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From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: xxm@rock-chips.com,
	"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
	stable@vger.kernel.org, "Damien Le Moal" <dlemoal@kernel.org>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Caleb Connolly" <kc@postmarketos.org>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Brian Norris" <briannorris@chromium.org>,
	"Corentin Labbe" <clabbe@baylibre.com>,
	"Arnaud Ferraris" <arnaud.ferraris@collabora.com>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Judy Hsiao" <judyhsiao@chromium.org>,
	"Hugh Cole-Baker" <sigmaris@gmail.com>,
	linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v4 09/11] PCI: rockchip: Use u32 variable to access 32-bit registers
Date: Mon, 17 Apr 2023 11:26:27 +0200	[thread overview]
Message-ID: <20230417092631.347976-10-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230417092631.347976-1-rick.wertenbroek@gmail.com>

Previously u16 variables were used to access 32-bit registers, this
resulted in not all of the data being read from the registers. Also
the left shift of more than 16-bits would result in moving data out
of the variable. Use u32 variables to access 32-bit registers

Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Cc: stable@vger.kernel.org
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Tested-by: Damien Le Moal <dlemoal@kernel.org>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 10 +++++-----
 drivers/pci/controller/pcie-rockchip.h    |  1 +
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 771f1bb93251..63fbb379638b 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -271,15 +271,15 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn,
 {
 	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags;
+	u32 flags;
 
 	flags = rockchip_pcie_read(rockchip,
 				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
 				   ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
 	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK;
 	flags |=
-	   ((multi_msg_cap << 1) <<  ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
-	   PCI_MSI_FLAGS_64BIT;
+	   (multi_msg_cap << ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
+	   (PCI_MSI_FLAGS_64BIT << ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET);
 	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MASK_MSI_CAP;
 	rockchip_pcie_write(rockchip, flags,
 			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -291,7 +291,7 @@ static int rockchip_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn)
 {
 	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags;
+	u32 flags;
 
 	flags = rockchip_pcie_read(rockchip,
 				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -352,7 +352,7 @@ static int rockchip_pcie_ep_send_msi_irq(struct rockchip_pcie_ep *ep, u8 fn,
 					 u8 interrupt_num)
 {
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags, mme, data, data_mask;
+	u32 flags, mme, data, data_mask;
 	u8 msi_count;
 	u64 pci_addr;
 	u32 r;
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index bef6d7098a2f..501d859420b4 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -227,6 +227,7 @@
 #define ROCKCHIP_PCIE_EP_CMD_STATUS			0x4
 #define   ROCKCHIP_PCIE_EP_CMD_STATUS_IS		BIT(19)
 #define ROCKCHIP_PCIE_EP_MSI_CTRL_REG			0x90
+#define   ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET		16
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET		17
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK		GENMASK(19, 17)
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MME_OFFSET		20
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: xxm@rock-chips.com,
	"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
	stable@vger.kernel.org, "Damien Le Moal" <dlemoal@kernel.org>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Caleb Connolly" <kc@postmarketos.org>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Brian Norris" <briannorris@chromium.org>,
	"Corentin Labbe" <clabbe@baylibre.com>,
	"Arnaud Ferraris" <arnaud.ferraris@collabora.com>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Judy Hsiao" <judyhsiao@chromium.org>,
	"Hugh Cole-Baker" <sigmaris@gmail.com>,
	linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v4 09/11] PCI: rockchip: Use u32 variable to access 32-bit registers
Date: Mon, 17 Apr 2023 11:26:27 +0200	[thread overview]
Message-ID: <20230417092631.347976-10-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230417092631.347976-1-rick.wertenbroek@gmail.com>

Previously u16 variables were used to access 32-bit registers, this
resulted in not all of the data being read from the registers. Also
the left shift of more than 16-bits would result in moving data out
of the variable. Use u32 variables to access 32-bit registers

Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Cc: stable@vger.kernel.org
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Tested-by: Damien Le Moal <dlemoal@kernel.org>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 10 +++++-----
 drivers/pci/controller/pcie-rockchip.h    |  1 +
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 771f1bb93251..63fbb379638b 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -271,15 +271,15 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn,
 {
 	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags;
+	u32 flags;
 
 	flags = rockchip_pcie_read(rockchip,
 				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
 				   ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
 	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK;
 	flags |=
-	   ((multi_msg_cap << 1) <<  ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
-	   PCI_MSI_FLAGS_64BIT;
+	   (multi_msg_cap << ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
+	   (PCI_MSI_FLAGS_64BIT << ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET);
 	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MASK_MSI_CAP;
 	rockchip_pcie_write(rockchip, flags,
 			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -291,7 +291,7 @@ static int rockchip_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn)
 {
 	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags;
+	u32 flags;
 
 	flags = rockchip_pcie_read(rockchip,
 				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -352,7 +352,7 @@ static int rockchip_pcie_ep_send_msi_irq(struct rockchip_pcie_ep *ep, u8 fn,
 					 u8 interrupt_num)
 {
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags, mme, data, data_mask;
+	u32 flags, mme, data, data_mask;
 	u8 msi_count;
 	u64 pci_addr;
 	u32 r;
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index bef6d7098a2f..501d859420b4 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -227,6 +227,7 @@
 #define ROCKCHIP_PCIE_EP_CMD_STATUS			0x4
 #define   ROCKCHIP_PCIE_EP_CMD_STATUS_IS		BIT(19)
 #define ROCKCHIP_PCIE_EP_MSI_CTRL_REG			0x90
+#define   ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET		16
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET		17
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK		GENMASK(19, 17)
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MME_OFFSET		20
-- 
2.25.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: xxm@rock-chips.com,
	"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
	stable@vger.kernel.org, "Damien Le Moal" <dlemoal@kernel.org>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Caleb Connolly" <kc@postmarketos.org>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Brian Norris" <briannorris@chromium.org>,
	"Corentin Labbe" <clabbe@baylibre.com>,
	"Arnaud Ferraris" <arnaud.ferraris@collabora.com>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Judy Hsiao" <judyhsiao@chromium.org>,
	"Hugh Cole-Baker" <sigmaris@gmail.com>,
	linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v4 09/11] PCI: rockchip: Use u32 variable to access 32-bit registers
Date: Mon, 17 Apr 2023 11:26:27 +0200	[thread overview]
Message-ID: <20230417092631.347976-10-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230417092631.347976-1-rick.wertenbroek@gmail.com>

Previously u16 variables were used to access 32-bit registers, this
resulted in not all of the data being read from the registers. Also
the left shift of more than 16-bits would result in moving data out
of the variable. Use u32 variables to access 32-bit registers

Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Cc: stable@vger.kernel.org
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Tested-by: Damien Le Moal <dlemoal@kernel.org>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 10 +++++-----
 drivers/pci/controller/pcie-rockchip.h    |  1 +
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 771f1bb93251..63fbb379638b 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -271,15 +271,15 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn,
 {
 	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags;
+	u32 flags;
 
 	flags = rockchip_pcie_read(rockchip,
 				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
 				   ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
 	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK;
 	flags |=
-	   ((multi_msg_cap << 1) <<  ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
-	   PCI_MSI_FLAGS_64BIT;
+	   (multi_msg_cap << ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |
+	   (PCI_MSI_FLAGS_64BIT << ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET);
 	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MASK_MSI_CAP;
 	rockchip_pcie_write(rockchip, flags,
 			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -291,7 +291,7 @@ static int rockchip_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn)
 {
 	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags;
+	u32 flags;
 
 	flags = rockchip_pcie_read(rockchip,
 				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -352,7 +352,7 @@ static int rockchip_pcie_ep_send_msi_irq(struct rockchip_pcie_ep *ep, u8 fn,
 					 u8 interrupt_num)
 {
 	struct rockchip_pcie *rockchip = &ep->rockchip;
-	u16 flags, mme, data, data_mask;
+	u32 flags, mme, data, data_mask;
 	u8 msi_count;
 	u64 pci_addr;
 	u32 r;
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index bef6d7098a2f..501d859420b4 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -227,6 +227,7 @@
 #define ROCKCHIP_PCIE_EP_CMD_STATUS			0x4
 #define   ROCKCHIP_PCIE_EP_CMD_STATUS_IS		BIT(19)
 #define ROCKCHIP_PCIE_EP_MSI_CTRL_REG			0x90
+#define   ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET		16
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET		17
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK		GENMASK(19, 17)
 #define   ROCKCHIP_PCIE_EP_MSI_CTRL_MME_OFFSET		20
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-04-17  9:28 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-17  9:26 [PATCH v4 00/11] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Rick Wertenbroek
2023-04-17  9:26 ` Rick Wertenbroek
2023-04-17  9:26 ` Rick Wertenbroek
2023-04-17  9:26 ` [PATCH v4 01/11] PCI: rockchip: Remove writes to unused registers Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17 23:58   ` Damien Le Moal
2023-04-17 23:58     ` Damien Le Moal
2023-04-17 23:58     ` Damien Le Moal
2023-04-17  9:26 ` [PATCH v4 02/11] PCI: rockchip: Write PCI Device ID to correct register Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26 ` [PATCH v4 03/11] PCI: rockchip: Assert PCI Configuration Enable bit after probe Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26 ` [PATCH v4 04/11] PCI: rockchip: Add poll and timeout to wait for PHY PLLs to be locked Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26 ` [PATCH v4 05/11] arm64: dts: rockchip: Add dtsi entry for RK3399 PCIe endpoint core Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26 ` [PATCH v4 06/11] dt-bindings: PCI: Update the RK3399 example to a valid one Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26 ` [PATCH v4 07/11] PCI: rockchip: Fix legacy IRQ generation for RK3399 PCIe endpoint core Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17 23:57   ` Damien Le Moal
2023-04-17 23:57     ` Damien Le Moal
2023-04-17 23:57     ` Damien Le Moal
2023-04-17  9:26 ` [PATCH v4 08/11] PCI: rockchip: Fix window mapping and address translation for endpoint Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17 23:55   ` Damien Le Moal
2023-04-17 23:55     ` Damien Le Moal
2023-04-17 23:55     ` Damien Le Moal
2023-04-17  9:26 ` Rick Wertenbroek [this message]
2023-04-17  9:26   ` [PATCH v4 09/11] PCI: rockchip: Use u32 variable to access 32-bit registers Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17 23:56   ` Damien Le Moal
2023-04-17 23:56     ` Damien Le Moal
2023-04-17 23:56     ` Damien Le Moal
2023-04-17  9:26 ` [PATCH v4 10/11] PCI: rockchip: Don't advertise MSI-X in PCIe capabilities Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17 23:50   ` Damien Le Moal
2023-04-17 23:50     ` Damien Le Moal
2023-04-17 23:50     ` Damien Le Moal
2023-04-17  9:26 ` [PATCH v4 11/11] PCI: rockchip: Set address alignment for endpoint mode Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17  9:26   ` Rick Wertenbroek
2023-04-17 23:51   ` Damien Le Moal
2023-04-17 23:51     ` Damien Le Moal
2023-04-17 23:51     ` Damien Le Moal
2023-04-18  7:11     ` Rick Wertenbroek
2023-04-18  7:11       ` Rick Wertenbroek
2023-04-18  7:11       ` Rick Wertenbroek
2023-04-18  0:09 ` [PATCH v4 00/11] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Damien Le Moal
2023-04-18  0:09   ` Damien Le Moal
2023-04-18  0:09   ` Damien Le Moal
2023-04-18  7:51   ` Rick Wertenbroek
2023-04-18  7:51     ` Rick Wertenbroek
2023-04-18  7:51     ` Rick Wertenbroek
2023-04-18  8:00     ` Damien Le Moal
2023-04-18  8:00       ` Damien Le Moal
2023-04-18  8:00       ` Damien Le Moal

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