All of lore.kernel.org
 help / color / mirror / Atom feed
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	John Harrison <John.C.Harrison@Intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v2 7/8] drm/i915/mtl/huc: Use the media gt for the HuC getparam
Date: Fri, 28 Apr 2023 11:58:09 -0700	[thread overview]
Message-ID: <20230428185810.4127234-8-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20230428185810.4127234-1-daniele.ceraolospurio@intel.com>

On MTL, for obvious reasons, HuC is only available on the media tile.
We already disable SW support for HuC on the root gt due to the
absence of VCS engines, but we also need to update the getparam to point
to the HuC struct in the media GT.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_getparam.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 2238e096c957..7aa47550e4f2 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -98,7 +98,11 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
 		value = sseu->min_eu_in_pool;
 		break;
 	case I915_PARAM_HUC_STATUS:
-		value = intel_huc_check_status(&to_gt(i915)->uc.huc);
+		/* On platform with a media GT, the HuC is on that GT */
+		if (i915->media_gt)
+			value = intel_huc_check_status(&i915->media_gt->uc.huc);
+		else
+			value = intel_huc_check_status(&to_gt(i915)->uc.huc);
 		if (value < 0)
 			return value;
 		break;
-- 
2.40.0


WARNING: multiple messages have this Message-ID (diff)
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 7/8] drm/i915/mtl/huc: Use the media gt for the HuC getparam
Date: Fri, 28 Apr 2023 11:58:09 -0700	[thread overview]
Message-ID: <20230428185810.4127234-8-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20230428185810.4127234-1-daniele.ceraolospurio@intel.com>

On MTL, for obvious reasons, HuC is only available on the media tile.
We already disable SW support for HuC on the root gt due to the
absence of VCS engines, but we also need to update the getparam to point
to the HuC struct in the media GT.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_getparam.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 2238e096c957..7aa47550e4f2 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -98,7 +98,11 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
 		value = sseu->min_eu_in_pool;
 		break;
 	case I915_PARAM_HUC_STATUS:
-		value = intel_huc_check_status(&to_gt(i915)->uc.huc);
+		/* On platform with a media GT, the HuC is on that GT */
+		if (i915->media_gt)
+			value = intel_huc_check_status(&i915->media_gt->uc.huc);
+		else
+			value = intel_huc_check_status(&to_gt(i915)->uc.huc);
 		if (value < 0)
 			return value;
 		break;
-- 
2.40.0


  parent reply	other threads:[~2023-04-28 18:58 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-28 18:58 [PATCH v2 0/8] drm/i915: HuC loading and authentication for MTL Daniele Ceraolo Spurio
2023-04-28 18:58 ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-04-28 18:58 ` [PATCH v2 1/8] DO NOT REVIEW: drm/i915: Add support for MTL GSC SW Proxy Daniele Ceraolo Spurio
2023-04-28 18:58   ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-04-28 18:58 ` [PATCH v2 2/8] drm/i915/uc: perma-pin firmwares Daniele Ceraolo Spurio
2023-04-28 18:58   ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-05-17 20:59   ` John Harrison
2023-05-17 21:12     ` Ceraolo Spurio, Daniele
2023-04-28 18:58 ` [PATCH v2 3/8] drm/i915/huc: Parse the GSC-enabled HuC binary Daniele Ceraolo Spurio
2023-04-28 18:58   ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-05-02 15:27   ` [PATCH v2] " Daniele Ceraolo Spurio
2023-05-02 15:27     ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-05-13  0:38     ` Teres Alexis, Alan Previn
2023-05-13  0:38       ` [Intel-gfx] " Teres Alexis, Alan Previn
2023-05-17 21:04     ` John Harrison
2023-05-19 20:35       ` Ceraolo Spurio, Daniele
2023-04-28 18:58 ` [PATCH v2 4/8] drm/i915/huc: Load GSC-enabled HuC via DMA xfer if the fuse says so Daniele Ceraolo Spurio
2023-04-28 18:58   ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-05-19 18:03   ` John Harrison
2023-05-20  0:05     ` Ceraolo Spurio, Daniele
2023-04-28 18:58 ` [PATCH v2 5/8] drm/i915/huc: differentiate the 2 steps of the MTL HuC auth flow Daniele Ceraolo Spurio
2023-04-28 18:58   ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-05-13  0:51   ` Teres Alexis, Alan Previn
2023-05-13  0:51     ` [Intel-gfx] " Teres Alexis, Alan Previn
2023-05-19 18:45   ` John Harrison
2023-05-20  0:17     ` Ceraolo Spurio, Daniele
2023-04-28 18:58 ` [PATCH v2 6/8] drm/i915/mtl/huc: auth HuC via GSC Daniele Ceraolo Spurio
2023-04-28 18:58   ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-04-28 18:58 ` Daniele Ceraolo Spurio [this message]
2023-04-28 18:58   ` [Intel-gfx] [PATCH v2 7/8] drm/i915/mtl/huc: Use the media gt for the HuC getparam Daniele Ceraolo Spurio
2023-05-25 19:53   ` John Harrison
2023-05-25 19:53     ` [Intel-gfx] " John Harrison
2023-04-28 18:58 ` [PATCH v2 8/8] drm/i915/huc: define HuC FW version for MTL Daniele Ceraolo Spurio
2023-04-28 18:58   ` [Intel-gfx] " Daniele Ceraolo Spurio
2023-05-25 19:54   ` John Harrison
2023-04-28 21:29 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: HuC loading and authentication for MTL (rev2) Patchwork
2023-04-28 21:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-28 21:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-05-02 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: HuC loading and authentication for MTL (rev3) Patchwork
2023-05-02 16:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-02 16:22 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-05-03 10:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: HuC loading and authentication for MTL (rev4) Patchwork
2023-05-03 10:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-03 10:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-03 13:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230428185810.4127234-8-daniele.ceraolospurio@intel.com \
    --to=daniele.ceraolospurio@intel.com \
    --cc=John.C.Harrison@Intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.