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From: Melissa Wen <mwen@igalia.com>
To: amd-gfx@lists.freedesktop.org,
	Harry Wentland <harry.wentland@amd.com>,
	Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
	sunpeng.li@amd.com, Alex Deucher <alexander.deucher@amd.com>,
	dri-devel@lists.freedesktop.org, christian.koenig@amd.com,
	Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch
Cc: Sebastian Wick <sebastian.wick@redhat.com>,
	Pekka Paalanen <pekka.paalanen@collabora.com>,
	Shashank Sharma <Shashank.Sharma@amd.com>,
	Alex Hung <alex.hung@amd.com>, Xaver Hugl <xaver.hugl@gmail.com>,
	kernel-dev@igalia.com,
	Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
	Joshua Ashton <joshua@froggi.es>,
	sungjoon.kim@amd.com
Subject: [PATCH 23/36] drm/amd/display: add CRTC regamma TF support
Date: Tue, 23 May 2023 21:15:07 -0100	[thread overview]
Message-ID: <20230523221520.3115570-24-mwen@igalia.com> (raw)
In-Reply-To: <20230523221520.3115570-1-mwen@igalia.com>

From: Joshua Ashton <joshua@froggi.es>

Add predefined transfer function programming. There is no out gamma ROM,
but we can use AMD color modules to program LUT parameters from a
predefined TF and an empty regamma LUT (or bump up LUT parameters with
predefined TF setup).

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 .../amd/display/amdgpu_dm/amdgpu_dm_color.c   | 58 ++++++++++++++-----
 1 file changed, 42 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 934636d7b8d3..146363363ef0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -268,16 +268,18 @@ static int __set_output_tf(struct dc_transfer_func *func,
 	struct calculate_buffer cal_buffer = {0};
 	bool res;
 
-	ASSERT(lut && lut_size == MAX_COLOR_LUT_ENTRIES);
-
 	cal_buffer.buffer_index = -1;
 
-	gamma = dc_create_gamma();
-	if (!gamma)
-		return -ENOMEM;
+	if (lut_size) {
+		ASSERT(lut && lut_size == MAX_COLOR_LUT_ENTRIES);
 
-	gamma->num_entries = lut_size;
-	__drm_lut_to_dc_gamma(lut, gamma, false);
+		gamma = dc_create_gamma();
+		if (!gamma)
+			return -ENOMEM;
+
+		gamma->num_entries = lut_size;
+		__drm_lut_to_dc_gamma(lut, gamma, false);
+	}
 
 	if (func->tf == TRANSFER_FUNCTION_LINEAR) {
 		/*
@@ -285,32 +287,36 @@ static int __set_output_tf(struct dc_transfer_func *func,
 		 * on top of a linear input. But degamma params can be used
 		 * instead to simulate this.
 		 */
-		gamma->type = GAMMA_CUSTOM;
+		if (gamma)
+			gamma->type = GAMMA_CUSTOM;
 		res = mod_color_calculate_degamma_params(NULL, func,
-							gamma, true);
+							 gamma, gamma != NULL);
 	} else {
 		/*
 		 * Assume sRGB. The actual mapping will depend on whether the
 		 * input was legacy or not.
 		 */
-		gamma->type = GAMMA_CS_TFM_1D;
-		res = mod_color_calculate_regamma_params(func, gamma, false,
+		if (gamma)
+			gamma->type = GAMMA_CS_TFM_1D;
+		res = mod_color_calculate_regamma_params(func, gamma, gamma != NULL,
 							 has_rom, NULL, &cal_buffer);
 	}
 
-	dc_gamma_release(&gamma);
+	if (gamma)
+		dc_gamma_release(&gamma);
 
 	return res ? 0 : -ENOMEM;
 }
 
 static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream,
 					const struct drm_color_lut *regamma_lut,
-					uint32_t regamma_size, bool has_rom)
+					uint32_t regamma_size, bool has_rom,
+					enum dc_transfer_func_predefined tf)
 {
 	struct dc_transfer_func *out_tf = stream->out_transfer_func;
 	int ret = 0;
 
-	if (regamma_size) {
+	if (regamma_size || tf != TRANSFER_FUNCTION_LINEAR) {
 		/* CRTC RGM goes into RGM LUT.
 		 *
 		 * Note: there is no implicit sRGB regamma here. We are using
@@ -318,7 +324,7 @@ static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream,
 		 * from a linear base.
 		 */
 		out_tf->type = TF_TYPE_DISTRIBUTED_POINTS;
-		out_tf->tf = TRANSFER_FUNCTION_LINEAR;
+		out_tf->tf = tf;
 
 		ret = __set_output_tf(out_tf, regamma_lut, regamma_size, has_rom);
 	} else {
@@ -364,6 +370,24 @@ static int __set_input_tf(struct dc_transfer_func *func,
 	return res ? 0 : -ENOMEM;
 }
 
+static enum dc_transfer_func_predefined drm_tf_to_dc_tf(enum drm_transfer_function drm_tf)
+{
+	switch (drm_tf)
+	{
+	default:
+	case DRM_TRANSFER_FUNCTION_DEFAULT:	return TRANSFER_FUNCTION_LINEAR;
+	case DRM_TRANSFER_FUNCTION_SRGB:	return TRANSFER_FUNCTION_SRGB;
+	case DRM_TRANSFER_FUNCTION_BT709:	return TRANSFER_FUNCTION_BT709;
+	case DRM_TRANSFER_FUNCTION_PQ:		return TRANSFER_FUNCTION_PQ;
+	case DRM_TRANSFER_FUNCTION_LINEAR:	return TRANSFER_FUNCTION_LINEAR;
+	case DRM_TRANSFER_FUNCTION_UNITY:	return TRANSFER_FUNCTION_UNITY;
+	case DRM_TRANSFER_FUNCTION_HLG:		return TRANSFER_FUNCTION_HLG;
+	case DRM_TRANSFER_FUNCTION_GAMMA22:	return TRANSFER_FUNCTION_GAMMA22;
+	case DRM_TRANSFER_FUNCTION_GAMMA24:	return TRANSFER_FUNCTION_GAMMA24;
+	case DRM_TRANSFER_FUNCTION_GAMMA26:	return TRANSFER_FUNCTION_GAMMA26;
+	}
+}
+
 static void __to_dc_lut3d_color(struct dc_rgb *rgb,
 				const struct drm_color_lut lut,
 				int bit_precision)
@@ -639,6 +663,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc,
 	const struct drm_color_lut *degamma_lut, *regamma_lut;
 	uint32_t degamma_size, regamma_size;
 	bool has_regamma, has_degamma;
+	enum dc_transfer_func_predefined tf = TRANSFER_FUNCTION_LINEAR;
 	bool is_legacy;
 	const struct drm_color_lut *shaper_lut, *lut3d;
 	uint32_t shaper_size, lut3d_size;
@@ -650,6 +675,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc,
 
 	lut3d = __extract_blob_lut(crtc->lut3d, &lut3d_size);
 	shaper_lut = __extract_blob_lut(crtc->shaper_lut, &shaper_size);
+	tf = drm_tf_to_dc_tf(crtc->regamma_tf);
 
 	r = amdgpu_dm_verify_lut_sizes(&crtc->base);
 	if (r)
@@ -718,7 +744,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc,
 		 */
 		regamma_size = has_regamma ? regamma_size : 0;
 		r = amdgpu_dm_set_atomic_regamma(stream, regamma_lut,
-						 regamma_size, has_rom);
+						 regamma_size, has_rom, tf);
 		if (r)
 			return r;
 	}
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Melissa Wen <mwen@igalia.com>
To: amd-gfx@lists.freedesktop.org,
	Harry Wentland <harry.wentland@amd.com>,
	Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
	sunpeng.li@amd.com, Alex Deucher <alexander.deucher@amd.com>,
	dri-devel@lists.freedesktop.org, christian.koenig@amd.com,
	Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch
Cc: Sebastian Wick <sebastian.wick@redhat.com>,
	Pekka Paalanen <pekka.paalanen@collabora.com>,
	Shashank Sharma <Shashank.Sharma@amd.com>,
	Alex Hung <alex.hung@amd.com>, Simon Ser <contact@emersion.fr>,
	Xaver Hugl <xaver.hugl@gmail.com>,
	kernel-dev@igalia.com,
	Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
	Joshua Ashton <joshua@froggi.es>,
	sungjoon.kim@amd.com
Subject: [PATCH 23/36] drm/amd/display: add CRTC regamma TF support
Date: Tue, 23 May 2023 21:15:07 -0100	[thread overview]
Message-ID: <20230523221520.3115570-24-mwen@igalia.com> (raw)
In-Reply-To: <20230523221520.3115570-1-mwen@igalia.com>

From: Joshua Ashton <joshua@froggi.es>

Add predefined transfer function programming. There is no out gamma ROM,
but we can use AMD color modules to program LUT parameters from a
predefined TF and an empty regamma LUT (or bump up LUT parameters with
predefined TF setup).

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 .../amd/display/amdgpu_dm/amdgpu_dm_color.c   | 58 ++++++++++++++-----
 1 file changed, 42 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 934636d7b8d3..146363363ef0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -268,16 +268,18 @@ static int __set_output_tf(struct dc_transfer_func *func,
 	struct calculate_buffer cal_buffer = {0};
 	bool res;
 
-	ASSERT(lut && lut_size == MAX_COLOR_LUT_ENTRIES);
-
 	cal_buffer.buffer_index = -1;
 
-	gamma = dc_create_gamma();
-	if (!gamma)
-		return -ENOMEM;
+	if (lut_size) {
+		ASSERT(lut && lut_size == MAX_COLOR_LUT_ENTRIES);
 
-	gamma->num_entries = lut_size;
-	__drm_lut_to_dc_gamma(lut, gamma, false);
+		gamma = dc_create_gamma();
+		if (!gamma)
+			return -ENOMEM;
+
+		gamma->num_entries = lut_size;
+		__drm_lut_to_dc_gamma(lut, gamma, false);
+	}
 
 	if (func->tf == TRANSFER_FUNCTION_LINEAR) {
 		/*
@@ -285,32 +287,36 @@ static int __set_output_tf(struct dc_transfer_func *func,
 		 * on top of a linear input. But degamma params can be used
 		 * instead to simulate this.
 		 */
-		gamma->type = GAMMA_CUSTOM;
+		if (gamma)
+			gamma->type = GAMMA_CUSTOM;
 		res = mod_color_calculate_degamma_params(NULL, func,
-							gamma, true);
+							 gamma, gamma != NULL);
 	} else {
 		/*
 		 * Assume sRGB. The actual mapping will depend on whether the
 		 * input was legacy or not.
 		 */
-		gamma->type = GAMMA_CS_TFM_1D;
-		res = mod_color_calculate_regamma_params(func, gamma, false,
+		if (gamma)
+			gamma->type = GAMMA_CS_TFM_1D;
+		res = mod_color_calculate_regamma_params(func, gamma, gamma != NULL,
 							 has_rom, NULL, &cal_buffer);
 	}
 
-	dc_gamma_release(&gamma);
+	if (gamma)
+		dc_gamma_release(&gamma);
 
 	return res ? 0 : -ENOMEM;
 }
 
 static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream,
 					const struct drm_color_lut *regamma_lut,
-					uint32_t regamma_size, bool has_rom)
+					uint32_t regamma_size, bool has_rom,
+					enum dc_transfer_func_predefined tf)
 {
 	struct dc_transfer_func *out_tf = stream->out_transfer_func;
 	int ret = 0;
 
-	if (regamma_size) {
+	if (regamma_size || tf != TRANSFER_FUNCTION_LINEAR) {
 		/* CRTC RGM goes into RGM LUT.
 		 *
 		 * Note: there is no implicit sRGB regamma here. We are using
@@ -318,7 +324,7 @@ static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream,
 		 * from a linear base.
 		 */
 		out_tf->type = TF_TYPE_DISTRIBUTED_POINTS;
-		out_tf->tf = TRANSFER_FUNCTION_LINEAR;
+		out_tf->tf = tf;
 
 		ret = __set_output_tf(out_tf, regamma_lut, regamma_size, has_rom);
 	} else {
@@ -364,6 +370,24 @@ static int __set_input_tf(struct dc_transfer_func *func,
 	return res ? 0 : -ENOMEM;
 }
 
+static enum dc_transfer_func_predefined drm_tf_to_dc_tf(enum drm_transfer_function drm_tf)
+{
+	switch (drm_tf)
+	{
+	default:
+	case DRM_TRANSFER_FUNCTION_DEFAULT:	return TRANSFER_FUNCTION_LINEAR;
+	case DRM_TRANSFER_FUNCTION_SRGB:	return TRANSFER_FUNCTION_SRGB;
+	case DRM_TRANSFER_FUNCTION_BT709:	return TRANSFER_FUNCTION_BT709;
+	case DRM_TRANSFER_FUNCTION_PQ:		return TRANSFER_FUNCTION_PQ;
+	case DRM_TRANSFER_FUNCTION_LINEAR:	return TRANSFER_FUNCTION_LINEAR;
+	case DRM_TRANSFER_FUNCTION_UNITY:	return TRANSFER_FUNCTION_UNITY;
+	case DRM_TRANSFER_FUNCTION_HLG:		return TRANSFER_FUNCTION_HLG;
+	case DRM_TRANSFER_FUNCTION_GAMMA22:	return TRANSFER_FUNCTION_GAMMA22;
+	case DRM_TRANSFER_FUNCTION_GAMMA24:	return TRANSFER_FUNCTION_GAMMA24;
+	case DRM_TRANSFER_FUNCTION_GAMMA26:	return TRANSFER_FUNCTION_GAMMA26;
+	}
+}
+
 static void __to_dc_lut3d_color(struct dc_rgb *rgb,
 				const struct drm_color_lut lut,
 				int bit_precision)
@@ -639,6 +663,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc,
 	const struct drm_color_lut *degamma_lut, *regamma_lut;
 	uint32_t degamma_size, regamma_size;
 	bool has_regamma, has_degamma;
+	enum dc_transfer_func_predefined tf = TRANSFER_FUNCTION_LINEAR;
 	bool is_legacy;
 	const struct drm_color_lut *shaper_lut, *lut3d;
 	uint32_t shaper_size, lut3d_size;
@@ -650,6 +675,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc,
 
 	lut3d = __extract_blob_lut(crtc->lut3d, &lut3d_size);
 	shaper_lut = __extract_blob_lut(crtc->shaper_lut, &shaper_size);
+	tf = drm_tf_to_dc_tf(crtc->regamma_tf);
 
 	r = amdgpu_dm_verify_lut_sizes(&crtc->base);
 	if (r)
@@ -718,7 +744,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc,
 		 */
 		regamma_size = has_regamma ? regamma_size : 0;
 		r = amdgpu_dm_set_atomic_regamma(stream, regamma_lut,
-						 regamma_size, has_rom);
+						 regamma_size, has_rom, tf);
 		if (r)
 			return r;
 	}
-- 
2.39.2


  parent reply	other threads:[~2023-05-23 22:16 UTC|newest]

Thread overview: 124+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-23 22:14 [PATCH 00/36] drm/amd/display: add AMD driver-specific properties for color mgmt Melissa Wen
2023-05-23 22:14 ` Melissa Wen
2023-05-23 22:14 ` [PATCH 01/36] drm/drm_mode_object: increase max objects to accommodate new color props Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:21   ` Simon Ser
2023-05-23 22:21     ` Simon Ser
2023-05-23 22:14 ` [PATCH 02/36] drm/drm_property: make replace_property_blob_from_id a DRM helper Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-25 14:48   ` Liviu Dudau
2023-05-25 14:48     ` Liviu Dudau
2023-05-23 22:14 ` [PATCH 03/36] drm/drm_plane: track color mgmt changes per plane Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 04/36] drm/amd/display: fix segment distribution for linear LUTs Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 05/36] drm/amd/display: fix the delta clamping for shaper LUT Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 06/36] drm/amd/display: add CRTC driver-specific property for gamma TF Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-24  8:24   ` Pekka Paalanen
2023-05-24  8:24     ` Pekka Paalanen
2023-05-25 15:32     ` Harry Wentland
2023-05-25 15:32       ` Harry Wentland
2023-05-25 19:43   ` kernel test robot
2023-05-25 19:43     ` kernel test robot
2023-06-01 19:17   ` Harry Wentland
2023-06-01 19:17     ` Harry Wentland
2023-06-06 16:18     ` Joshua Ashton
2023-06-06 16:18       ` Joshua Ashton
2023-06-06 16:26       ` Sebastian Wick
2023-06-06 16:26         ` Sebastian Wick
2023-06-06 16:57         ` Melissa Wen
2023-06-06 16:57           ` Melissa Wen
2023-06-06 20:03           ` Harry Wentland
2023-06-06 20:03             ` Harry Wentland
2023-06-06 17:14     ` Melissa Wen
2023-06-06 17:14       ` Melissa Wen
2023-05-23 22:14 ` [PATCH 07/36] drm/amd/display: add plane driver-specific properties for degamma LUT Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-06-01 19:24   ` Harry Wentland
2023-06-01 19:24     ` Harry Wentland
2023-06-06 17:15     ` Melissa Wen
2023-06-06 17:15       ` Melissa Wen
2023-06-10  5:34       ` Joshua Ashton
2023-06-10  5:34         ` Joshua Ashton
2023-05-23 22:14 ` [PATCH 08/36] drm/amd/display: add plane degamma TF driver-specific property Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-26  2:57   ` kernel test robot
2023-05-26  2:57     ` kernel test robot
2023-05-23 22:14 ` [PATCH 09/36] drm/amd/display: add plane HDR multiplier " Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-06-01 19:33   ` Harry Wentland
2023-06-01 19:33     ` Harry Wentland
2023-05-23 22:14 ` [PATCH 10/36] drm/amd/display: add plane 3D LUT driver-specific properties Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 11/36] drm/amd/display: add plane shaper " Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 12/36] drm/amd/display: add plane shaper TF driver-private property Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 13/36] drm/amd/display: add plane blend LUT and TF driver-specific properties Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 14/36] drm/amd/display: add comments to describe DM crtc color mgmt behavior Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:14 ` [PATCH 15/36] drm/amd/display: encapsulate atomic regamma operation Melissa Wen
2023-05-23 22:14   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 16/36] drm/amd/display: update lut3d and shaper lut to stream Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 17/36] drm/amd/display: copy 3D LUT settings from crtc state to stream_update Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 18/36] drm/amd/display: allow BYPASS 3D LUT but keep shaper LUT settings Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 19/36] drm/amd/display: handle MPC 3D LUT resources for a given context Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 20/36] drm/amd/display: dynamically acquire 3DLUT resources for color changes Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 21/36] drm/amd/display: add CRTC 3D LUT support Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-25  1:13   ` kernel test robot
2023-05-25  1:13     ` kernel test robot
2023-06-01 20:19   ` Harry Wentland
2023-06-01 20:19     ` Harry Wentland
2023-06-06 17:03     ` Melissa Wen
2023-06-06 17:03       ` Melissa Wen
2023-05-23 22:15 ` [PATCH 22/36] drm/amd/display: add CRTC shaper " Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` Melissa Wen [this message]
2023-05-23 22:15   ` [PATCH 23/36] drm/amd/display: add CRTC regamma TF support Melissa Wen
2023-05-23 22:15 ` [PATCH 24/36] drm/amd/display: set sdr_ref_white_level to 80 for out_transfer_func Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 25/36] drm/amd/display: add CRTC shaper TF support Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 26/36] drm/amd/display: mark plane as needing reset if plane color mgmt changes Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 27/36] drm/amd/display: decouple steps for mapping CRTC degamma to DC plane Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 28/36] drm/amd/display: add support for plane degamma TF and LUT properties Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 29/36] drm/amd/display: reject atomic commit if setting both plane and CRTC degamma Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 30/36] drm/amd/display: add dc_fixpt_from_s3132 helper Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 31/36] drm/adm/display: add HDR multiplier support Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 32/36] drm/amd/display: program DPP shaper and 3D LUT if updated Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 33/36] drm/amd/display: add plane shaper/3D LUT and shaper TF support Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 34/36] drm/amd/display: handle empty LUTs in __set_input_tf Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 35/36] drm/amd/display: add DRM plane blend LUT and TF support Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-05-23 22:15 ` [PATCH 36/36] drm/amd/display: allow newer DC hardware to use degamma ROM for PQ/HLG Melissa Wen
2023-05-23 22:15   ` Melissa Wen
2023-06-02 15:10   ` Harry Wentland
2023-06-02 15:10     ` Harry Wentland
2023-05-29 22:55 ` [PATCH 00/36] drm/amd/display: add AMD driver-specific properties for color mgmt Dmitry Baryshkov
2023-05-29 22:55   ` Dmitry Baryshkov
2023-05-30  7:22   ` Pekka Paalanen
2023-05-30  7:22     ` Pekka Paalanen
2023-06-02 15:18 ` Harry Wentland
2023-06-02 15:18   ` Harry Wentland
2023-06-06 17:22   ` Melissa Wen
2023-06-06 17:22     ` Melissa Wen
2023-06-06 17:29     ` Melissa Wen
2023-06-06 17:29       ` Melissa Wen

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