From: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
To: herbert@gondor.apana.org.au
Cc: linux-crypto@vger.kernel.org, qat-linux@intel.com,
Karthikeyan Gopal <karthikeyan.gopal@intel.com>,
Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Subject: [PATCH] crypto: qat - set deprecated capabilities as reserved
Date: Tue, 30 May 2023 16:58:11 +0100 [thread overview]
Message-ID: <20230530155811.6554-1-giovanni.cabiddu@intel.com> (raw)
From: Karthikeyan Gopal <karthikeyan.gopal@intel.com>
The LZS and RAND features are no longer available on QAT.
Remove the definition of bit 6 (LZS) and bit 7 (RAND) in the enum that
represents the capabilities and replace them with a comment mentioning
that those bits are reserved.
Those bits shall not be used in future.
Signed-off-by: Karthikeyan Gopal <karthikeyan.gopal@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
---
drivers/crypto/intel/qat/qat_common/icp_qat_hw.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h b/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h
index 4042739bb6fa..a65059e56248 100644
--- a/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h
+++ b/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h
@@ -87,8 +87,7 @@ enum icp_qat_capabilities_mask {
ICP_ACCEL_CAPABILITIES_AUTHENTICATION = BIT(3),
ICP_ACCEL_CAPABILITIES_RESERVED_1 = BIT(4),
ICP_ACCEL_CAPABILITIES_COMPRESSION = BIT(5),
- ICP_ACCEL_CAPABILITIES_LZS_COMPRESSION = BIT(6),
- ICP_ACCEL_CAPABILITIES_RAND = BIT(7),
+ /* Bits 6-7 are currently reserved */
ICP_ACCEL_CAPABILITIES_ZUC = BIT(8),
ICP_ACCEL_CAPABILITIES_SHA3 = BIT(9),
/* Bits 10-11 are currently reserved */
--
2.40.1
next reply other threads:[~2023-05-30 15:58 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-30 15:58 Giovanni Cabiddu [this message]
2023-06-09 9:12 ` [PATCH] crypto: qat - set deprecated capabilities as reserved Herbert Xu
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