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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: chunkuang.hu@kernel.org
Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch,
	matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com,
	dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, wenst@chromium.org,
	kernel@collabora.com,
	"Jason-JH . Lin" <jason-jh.lin@mediatek.com>
Subject: [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming
Date: Thu,  1 Jun 2023 14:10:16 +0200	[thread overview]
Message-ID: <20230601121022.2401844-6-angelogioacchino.delregno@collabora.com> (raw)
In-Reply-To: <20230601121022.2401844-1-angelogioacchino.delregno@collabora.com>

Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.

Note:
GAMMA should get enabled in between vblanks, but this requires many
efforts in order to make this happen, as that requires migrating all
of the writes to make use of CMDQ instead of cpu writes and that's
not trivial. For this reason, this patch only moves the LUT enable.
The CMDQ rework will come at a later time.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 204a1aa7bfc9..b75a77af5205 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -71,12 +71,12 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
 void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
 {
 	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
-	unsigned int i, reg;
+	unsigned int i;
 	struct drm_color_lut *lut;
 	void __iomem *lut_base;
 	bool lut_diff;
 	u16 lut_size;
-	u32 word;
+	u32 cfg_val, word;
 
 	/* If there's no gamma lut there's nothing to do here. */
 	if (!state->gamma_lut)
@@ -90,9 +90,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		lut_size = LUT_SIZE_DEFAULT;
 	}
 
-	reg = readl(regs + DISP_GAMMA_CFG);
-	reg = reg | GAMMA_LUT_EN;
-	writel(reg, regs + DISP_GAMMA_CFG);
+	cfg_val = readl(regs + DISP_GAMMA_CFG);
 	lut_base = regs + DISP_GAMMA_LUT;
 	lut = (struct drm_color_lut *)state->gamma_lut->data;
 	for (i = 0; i < lut_size; i++) {
@@ -122,6 +120,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		}
 		writel(word, (lut_base + i * 4));
 	}
+
+	/* Enable the gamma table */
+	cfg_val = cfg_val | GAMMA_LUT_EN;
+
+	writel(cfg_val, regs + DISP_GAMMA_CFG);
 }
 
 void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
-- 
2.40.1


WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: chunkuang.hu@kernel.org
Cc: "Jason-JH . Lin" <jason-jh.lin@mediatek.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org, wenst@chromium.org,
	matthias.bgg@gmail.com, kernel@collabora.com,
	linux-arm-kernel@lists.infradead.org,
	angelogioacchino.delregno@collabora.com
Subject: [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming
Date: Thu,  1 Jun 2023 14:10:16 +0200	[thread overview]
Message-ID: <20230601121022.2401844-6-angelogioacchino.delregno@collabora.com> (raw)
In-Reply-To: <20230601121022.2401844-1-angelogioacchino.delregno@collabora.com>

Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.

Note:
GAMMA should get enabled in between vblanks, but this requires many
efforts in order to make this happen, as that requires migrating all
of the writes to make use of CMDQ instead of cpu writes and that's
not trivial. For this reason, this patch only moves the LUT enable.
The CMDQ rework will come at a later time.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 204a1aa7bfc9..b75a77af5205 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -71,12 +71,12 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
 void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
 {
 	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
-	unsigned int i, reg;
+	unsigned int i;
 	struct drm_color_lut *lut;
 	void __iomem *lut_base;
 	bool lut_diff;
 	u16 lut_size;
-	u32 word;
+	u32 cfg_val, word;
 
 	/* If there's no gamma lut there's nothing to do here. */
 	if (!state->gamma_lut)
@@ -90,9 +90,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		lut_size = LUT_SIZE_DEFAULT;
 	}
 
-	reg = readl(regs + DISP_GAMMA_CFG);
-	reg = reg | GAMMA_LUT_EN;
-	writel(reg, regs + DISP_GAMMA_CFG);
+	cfg_val = readl(regs + DISP_GAMMA_CFG);
 	lut_base = regs + DISP_GAMMA_LUT;
 	lut = (struct drm_color_lut *)state->gamma_lut->data;
 	for (i = 0; i < lut_size; i++) {
@@ -122,6 +120,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		}
 		writel(word, (lut_base + i * 4));
 	}
+
+	/* Enable the gamma table */
+	cfg_val = cfg_val | GAMMA_LUT_EN;
+
+	writel(cfg_val, regs + DISP_GAMMA_CFG);
 }
 
 void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
-- 
2.40.1


WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: chunkuang.hu@kernel.org
Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch,
	matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com,
	dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, wenst@chromium.org,
	kernel@collabora.com,
	"Jason-JH . Lin" <jason-jh.lin@mediatek.com>
Subject: [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming
Date: Thu,  1 Jun 2023 14:10:16 +0200	[thread overview]
Message-ID: <20230601121022.2401844-6-angelogioacchino.delregno@collabora.com> (raw)
In-Reply-To: <20230601121022.2401844-1-angelogioacchino.delregno@collabora.com>

Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.

Note:
GAMMA should get enabled in between vblanks, but this requires many
efforts in order to make this happen, as that requires migrating all
of the writes to make use of CMDQ instead of cpu writes and that's
not trivial. For this reason, this patch only moves the LUT enable.
The CMDQ rework will come at a later time.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 204a1aa7bfc9..b75a77af5205 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -71,12 +71,12 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
 void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
 {
 	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
-	unsigned int i, reg;
+	unsigned int i;
 	struct drm_color_lut *lut;
 	void __iomem *lut_base;
 	bool lut_diff;
 	u16 lut_size;
-	u32 word;
+	u32 cfg_val, word;
 
 	/* If there's no gamma lut there's nothing to do here. */
 	if (!state->gamma_lut)
@@ -90,9 +90,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		lut_size = LUT_SIZE_DEFAULT;
 	}
 
-	reg = readl(regs + DISP_GAMMA_CFG);
-	reg = reg | GAMMA_LUT_EN;
-	writel(reg, regs + DISP_GAMMA_CFG);
+	cfg_val = readl(regs + DISP_GAMMA_CFG);
 	lut_base = regs + DISP_GAMMA_LUT;
 	lut = (struct drm_color_lut *)state->gamma_lut->data;
 	for (i = 0; i < lut_size; i++) {
@@ -122,6 +120,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		}
 		writel(word, (lut_base + i * 4));
 	}
+
+	/* Enable the gamma table */
+	cfg_val = cfg_val | GAMMA_LUT_EN;
+
+	writel(cfg_val, regs + DISP_GAMMA_CFG);
 }
 
 void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
-- 
2.40.1


_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-06-01 12:11 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-01 12:10 [PATCH v5 00/11] MediaTek DDP GAMMA - 12-bit LUT support AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 01/11] drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 02/11] drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common() AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-27  3:37   ` CK Hu (胡俊光)
2023-06-27  3:37     ` CK Hu (胡俊光)
2023-06-27  3:37     ` CK Hu (胡俊光)
2023-06-01 12:10 ` [PATCH v5 04/11] drm/mediatek: gamma: Improve and simplify HW LUT calculation AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno [this message]
2023-06-01 12:10   ` [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 06/11] drm/mediatek: gamma: Use bitfield macros AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 07/11] drm/mediatek: gamma: Support specifying number of bits per LUT component AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 08/11] drm/mediatek: gamma: Support multi-bank gamma LUT AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 09/11] drm/mediatek: gamma: Add support for 12-bit LUT and MT8195 AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 10/11] drm/mediatek: gamma: Make sure relay mode is disabled AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-01 12:10   ` AngeloGioacchino Del Regno
2023-06-10  6:58   ` Dan Carpenter
2023-06-10  6:58     ` Dan Carpenter
2023-06-10  6:58     ` Dan Carpenter

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