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From: Parikshit Pareek <quic_ppareek@quicinc.com>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	"Joerg Roedel" <joro@8bytes.org>,
	Rob Herring <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Manivannan Sadhasivam <mani@kernel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	Adam Skladowski <a39.skl@gmail.com>,
	<linux-arm-msm@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<devicetree@vger.kernel.org>,
	"linux-kernel @ vger . kernel . org Prasanna Kumar" 
	<quic_kprasan@quicinc.com>,
	Shazad Hussain <quic_shazhuss@quicinc.com>,
	Parikshit Pareek <quic_ppareek@quicinc.com>
Subject: [PATCH 3/3] iommu/arm-smmu-qcom: Add support for the interconnect
Date: Fri, 9 Jun 2023 11:22:25 +0530	[thread overview]
Message-ID: <20230609055225.20717-1-quic_ppareek@quicinc.com> (raw)
In-Reply-To: <20230609054141.18938-1-quic_ppareek@quicinc.com>

Introduce support to detect the interconnect, and set its bandwidth.
For certain targets, we need to set the bandwidth of interconnect,
connecting smmu to memory. This is accessed during memory mapped IO
access to smmu registers, and during page tables walks.

Reported-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index c71afda79d64..6961d564869b 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -8,6 +8,7 @@
 #include <linux/delay.h>
 #include <linux/of_device.h>
 #include <linux/firmware/qcom/qcom_scm.h>
+#include <linux/interconnect.h>
 
 #include "arm-smmu.h"
 #include "arm-smmu-qcom.h"
@@ -549,6 +550,8 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
 {
 	const struct device_node *np = smmu->dev->of_node;
 	const struct of_device_id *match;
+	struct icc_path *icc_path;
+	int ret, icc_bw;
 
 #ifdef CONFIG_ACPI
 	if (np == NULL) {
@@ -558,6 +561,19 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
 	}
 #endif
 
+	icc_path = devm_of_icc_get(smmu->dev, "tbu_mc");
+	if (IS_ERR(icc_path))
+		return (struct arm_smmu_device *)icc_path;
+
+	ret = of_property_read_u32(np, "icc_bw", &icc_bw);
+
+	/*if interconnect exists, check for the  bandwidth value*/
+	if (icc_path && !ret) {
+		ret = icc_set_bw(icc_path, 0, MBps_to_icc(icc_bw));
+		if (ret)
+			return ERR_PTR(ret);
+	}
+
 	match = of_match_node(qcom_smmu_impl_of_match, np);
 	if (match)
 		return qcom_smmu_create(smmu, match->data);
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Parikshit Pareek <quic_ppareek@quicinc.com>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	"Joerg Roedel" <joro@8bytes.org>,
	Rob Herring <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Manivannan Sadhasivam <mani@kernel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	Adam Skladowski <a39.skl@gmail.com>,
	<linux-arm-msm@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<devicetree@vger.kernel.org>,
	"linux-kernel @ vger . kernel . org Prasanna Kumar"
	<quic_kprasan@quicinc.com>,
	Shazad Hussain <quic_shazhuss@quicinc.com>,
	Parikshit Pareek <quic_ppareek@quicinc.com>
Subject: [PATCH 3/3] iommu/arm-smmu-qcom: Add support for the interconnect
Date: Fri, 9 Jun 2023 11:22:25 +0530	[thread overview]
Message-ID: <20230609055225.20717-1-quic_ppareek@quicinc.com> (raw)
In-Reply-To: <20230609054141.18938-1-quic_ppareek@quicinc.com>

Introduce support to detect the interconnect, and set its bandwidth.
For certain targets, we need to set the bandwidth of interconnect,
connecting smmu to memory. This is accessed during memory mapped IO
access to smmu registers, and during page tables walks.

Reported-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index c71afda79d64..6961d564869b 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -8,6 +8,7 @@
 #include <linux/delay.h>
 #include <linux/of_device.h>
 #include <linux/firmware/qcom/qcom_scm.h>
+#include <linux/interconnect.h>
 
 #include "arm-smmu.h"
 #include "arm-smmu-qcom.h"
@@ -549,6 +550,8 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
 {
 	const struct device_node *np = smmu->dev->of_node;
 	const struct of_device_id *match;
+	struct icc_path *icc_path;
+	int ret, icc_bw;
 
 #ifdef CONFIG_ACPI
 	if (np == NULL) {
@@ -558,6 +561,19 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
 	}
 #endif
 
+	icc_path = devm_of_icc_get(smmu->dev, "tbu_mc");
+	if (IS_ERR(icc_path))
+		return (struct arm_smmu_device *)icc_path;
+
+	ret = of_property_read_u32(np, "icc_bw", &icc_bw);
+
+	/*if interconnect exists, check for the  bandwidth value*/
+	if (icc_path && !ret) {
+		ret = icc_set_bw(icc_path, 0, MBps_to_icc(icc_bw));
+		if (ret)
+			return ERR_PTR(ret);
+	}
+
 	match = of_match_node(qcom_smmu_impl_of_match, np);
 	if (match)
 		return qcom_smmu_create(smmu, match->data);
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-06-09  5:53 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-09  5:41 [PATCH 0/3] arm64: dts: qcom: sa8775p: Add interconnect to SMMU Parikshit Pareek
2023-06-09  5:41 ` Parikshit Pareek
2023-06-09  5:41 ` [PATCH 1/3] dt-bindings: arm-smmu: Add interconnect for qcom SMMUs Parikshit Pareek
2023-06-09  5:41   ` Parikshit Pareek
2023-06-09  8:53   ` Konrad Dybcio
2023-06-09  8:53     ` Konrad Dybcio
2023-06-09 13:23   ` Krzysztof Kozlowski
2023-06-09 13:23     ` Krzysztof Kozlowski
2023-06-09  5:41 ` [PATCH 2/3] arm64: dts: qcom: sa8775p: Add interconnect to PCIe SMMU Parikshit Pareek
2023-06-09  5:41   ` Parikshit Pareek
2023-06-09 13:23   ` Krzysztof Kozlowski
2023-06-09 13:23     ` Krzysztof Kozlowski
2023-06-09  5:52 ` Parikshit Pareek [this message]
2023-06-09  5:52   ` [PATCH 3/3] iommu/arm-smmu-qcom: Add support for the interconnect Parikshit Pareek
2023-06-09  8:56   ` Konrad Dybcio
2023-06-09  8:56     ` Konrad Dybcio
2023-06-09  8:52 ` [PATCH 0/3] arm64: dts: qcom: sa8775p: Add interconnect to SMMU Konrad Dybcio
2023-06-09  8:52   ` Konrad Dybcio
2023-06-09 12:56   ` Parikshit Pareek
2023-06-09 12:56     ` Parikshit Pareek
2023-06-09 14:45     ` Robin Murphy
2023-06-09 14:45       ` Robin Murphy
2023-06-09 14:52       ` Konrad Dybcio
2023-06-09 14:52         ` Konrad Dybcio
2023-06-09 14:56         ` Dmitry Baryshkov
2023-06-09 14:56           ` Dmitry Baryshkov
2023-06-09 15:39           ` Robin Murphy
2023-06-09 15:39             ` Robin Murphy
2023-07-12 13:10             ` Shazad Hussain
2023-07-12 13:10               ` Shazad Hussain
2023-06-09 15:07         ` Robin Murphy
2023-06-09 15:07           ` Robin Murphy
2023-06-09 15:22           ` Konrad Dybcio
2023-06-09 15:22             ` Konrad Dybcio
2023-07-19 15:37 ` Manivannan Sadhasivam
2023-07-19 15:37   ` Manivannan Sadhasivam

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