From: Bartosz Golaszewski <brgl@bgdev.pl> To: Vinod Koul <vkoul@kernel.org>, Bhupesh Sharma <bhupesh.sharma@linaro.org>, Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, "David S . Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Giuseppe Cavallaro <peppe.cavallaro@st.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Jose Abreu <joabreu@synopsys.com> Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Subject: [PATCH 21/26] net: stmmac: dwmac-qcom-ethqos: add support for emac4 on sa8775p platforms Date: Mon, 12 Jun 2023 11:23:50 +0200 [thread overview] Message-ID: <20230612092355.87937-22-brgl@bgdev.pl> (raw) In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> sa8775p uses EMAC version 4, add the relevant defines, rename the has_emac3 switch to has_emac_ge_3 (has emac greater-or-equal than 3) and add the new compatible. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 64 +++++++++++++++---- 1 file changed, 50 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 247e3888cca0..047c569e5480 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -89,7 +89,8 @@ struct ethqos_emac_driver_data { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; + bool has_integrated_pcs; struct dwmac4_addrs dwmac4_addrs; }; @@ -109,7 +110,7 @@ struct qcom_ethqos { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; }; static int rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset) @@ -203,7 +204,7 @@ static const struct ethqos_emac_driver_data emac_v2_3_0_data = { .por = emac_v2_3_0_por, .num_por = ARRAY_SIZE(emac_v2_3_0_por), .rgmii_config_loopback_en = true, - .has_emac3 = false, + .has_emac_ge_3 = false, }; static const struct ethqos_emac_por emac_v2_1_0_por[] = { @@ -219,7 +220,7 @@ static const struct ethqos_emac_driver_data emac_v2_1_0_data = { .por = emac_v2_1_0_por, .num_por = ARRAY_SIZE(emac_v2_1_0_por), .rgmii_config_loopback_en = false, - .has_emac3 = false, + .has_emac_ge_3 = false, }; static const struct ethqos_emac_por emac_v3_0_0_por[] = { @@ -235,7 +236,40 @@ static const struct ethqos_emac_driver_data emac_v3_0_0_data = { .por = emac_v3_0_0_por, .num_por = ARRAY_SIZE(emac_v3_0_0_por), .rgmii_config_loopback_en = false, - .has_emac3 = true, + .has_emac_ge_3 = true, + .dwmac4_addrs = { + .dma_chan = 0x00008100, + .dma_chan_offset = 0x1000, + .mtl_chan = 0x00008000, + .mtl_chan_offset = 0x1000, + .mtl_ets_ctrl = 0x00008010, + .mtl_ets_ctrl_offset = 0x1000, + .mtl_txq_weight = 0x00008018, + .mtl_txq_weight_offset = 0x1000, + .mtl_send_slp_cred = 0x0000801c, + .mtl_send_slp_cred_offset = 0x1000, + .mtl_high_cred = 0x00008020, + .mtl_high_cred_offset = 0x1000, + .mtl_low_cred = 0x00008024, + .mtl_low_cred_offset = 0x1000, + }, +}; + +static const struct ethqos_emac_por emac_v4_0_0_por[] = { + { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x40c01343 }, + { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642c }, + { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x80040800 }, + { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 }, + { .offset = SDCC_USR_CTL, .value = 0x00010800 }, + { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 }, +}; + +static const struct ethqos_emac_driver_data emac_v4_0_0_data = { + .por = emac_v4_0_0_por, + .num_por = ARRAY_SIZE(emac_v3_0_0_por), + .rgmii_config_loopback_en = false, + .has_emac_ge_3 = true, + .has_integrated_pcs = true, .dwmac4_addrs = { .dma_chan = 0x00008100, .dma_chan_offset = 0x1000, @@ -276,7 +310,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN, SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG); - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_MCLK_GATING_EN, 0, SDCC_HC_REG_DLL_CONFIG); @@ -317,7 +351,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_HC_REG_DLL_CONFIG2); - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS, 0, SDCC_HC_REG_DLL_CONFIG2); @@ -387,7 +421,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) /* PRG_RCLK_DLY = TCXO period * TCXO_CYCLES_CNT / 2 * RX delay ns, * in practice this becomes PRG_RCLK_DLY = 52 * 4 / 2 * RX delay ns */ - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { /* 0.9 ns */ rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY, 115, SDCC_HC_REG_DDR_CONFIG); @@ -422,7 +456,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -462,7 +496,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) RGMII_IO_MACRO_CONFIG); rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -512,7 +546,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN, SDCC_DLL_CONFIG_PDN, SDCC_HC_REG_DLL_CONFIG); - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { if (ethqos->speed == SPEED_1000) { rgmii_writel(ethqos, 0x1800000, SDCC_TEST_CTL); rgmii_writel(ethqos, 0x2C010800, SDCC_USR_CTL); @@ -542,7 +576,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos) SDCC_HC_REG_DLL_CONFIG); /* Set USR_CTL bit 26 with mask of 3 bits */ - if (!ethqos->has_emac3) + if (!ethqos->has_emac_ge_3) rgmii_updatel(ethqos, GENMASK(26, 24), BIT(26), SDCC_USR_CTL); @@ -729,7 +763,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) ethqos->por = data->por; ethqos->num_por = data->num_por; ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en; - ethqos->has_emac3 = data->has_emac3; + ethqos->has_emac_ge_3 = data->has_emac_ge_3; ethqos->rgmii_clk = devm_clk_get_optional(dev, "rgmii"); if (IS_ERR(ethqos->rgmii_clk)) { @@ -769,12 +803,13 @@ static int qcom_ethqos_probe(struct platform_device *pdev) plat_dat->fix_mac_speed = ethqos_fix_mac_speed; plat_dat->dump_debug_regs = rgmii_dump; plat_dat->has_gmac4 = 1; - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) plat_dat->dwmac4_addrs = &data->dwmac4_addrs; plat_dat->pmt = 1; plat_dat->tso_en = of_property_read_bool(np, "snps,tso"); if (of_device_is_compatible(np, "qcom,qcs404-ethqos")) plat_dat->rx_clk_runs_in_lpi = 1; + plat_dat->has_integrated_pcs = data->has_integrated_pcs; if (ethqos->serdes_phy) { plat_dat->serdes_powerup = qcom_ethqos_serdes_powerup; @@ -795,6 +830,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) static const struct of_device_id qcom_ethqos_match[] = { { .compatible = "qcom,qcs404-ethqos", .data = &emac_v2_3_0_data}, + { .compatible = "qcom,sa8775p-ethqos", .data = &emac_v4_0_0_data}, { .compatible = "qcom,sc8280xp-ethqos", .data = &emac_v3_0_0_data}, { .compatible = "qcom,sm8150-ethqos", .data = &emac_v2_1_0_data}, { } -- 2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Bartosz Golaszewski <brgl@bgdev.pl> To: Vinod Koul <vkoul@kernel.org>, Bhupesh Sharma <bhupesh.sharma@linaro.org>, Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, "David S . Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Giuseppe Cavallaro <peppe.cavallaro@st.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Jose Abreu <joabreu@synopsys.com> Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Subject: [PATCH 21/26] net: stmmac: dwmac-qcom-ethqos: add support for emac4 on sa8775p platforms Date: Mon, 12 Jun 2023 11:23:50 +0200 [thread overview] Message-ID: <20230612092355.87937-22-brgl@bgdev.pl> (raw) In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> sa8775p uses EMAC version 4, add the relevant defines, rename the has_emac3 switch to has_emac_ge_3 (has emac greater-or-equal than 3) and add the new compatible. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 64 +++++++++++++++---- 1 file changed, 50 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 247e3888cca0..047c569e5480 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -89,7 +89,8 @@ struct ethqos_emac_driver_data { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; + bool has_integrated_pcs; struct dwmac4_addrs dwmac4_addrs; }; @@ -109,7 +110,7 @@ struct qcom_ethqos { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; }; static int rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset) @@ -203,7 +204,7 @@ static const struct ethqos_emac_driver_data emac_v2_3_0_data = { .por = emac_v2_3_0_por, .num_por = ARRAY_SIZE(emac_v2_3_0_por), .rgmii_config_loopback_en = true, - .has_emac3 = false, + .has_emac_ge_3 = false, }; static const struct ethqos_emac_por emac_v2_1_0_por[] = { @@ -219,7 +220,7 @@ static const struct ethqos_emac_driver_data emac_v2_1_0_data = { .por = emac_v2_1_0_por, .num_por = ARRAY_SIZE(emac_v2_1_0_por), .rgmii_config_loopback_en = false, - .has_emac3 = false, + .has_emac_ge_3 = false, }; static const struct ethqos_emac_por emac_v3_0_0_por[] = { @@ -235,7 +236,40 @@ static const struct ethqos_emac_driver_data emac_v3_0_0_data = { .por = emac_v3_0_0_por, .num_por = ARRAY_SIZE(emac_v3_0_0_por), .rgmii_config_loopback_en = false, - .has_emac3 = true, + .has_emac_ge_3 = true, + .dwmac4_addrs = { + .dma_chan = 0x00008100, + .dma_chan_offset = 0x1000, + .mtl_chan = 0x00008000, + .mtl_chan_offset = 0x1000, + .mtl_ets_ctrl = 0x00008010, + .mtl_ets_ctrl_offset = 0x1000, + .mtl_txq_weight = 0x00008018, + .mtl_txq_weight_offset = 0x1000, + .mtl_send_slp_cred = 0x0000801c, + .mtl_send_slp_cred_offset = 0x1000, + .mtl_high_cred = 0x00008020, + .mtl_high_cred_offset = 0x1000, + .mtl_low_cred = 0x00008024, + .mtl_low_cred_offset = 0x1000, + }, +}; + +static const struct ethqos_emac_por emac_v4_0_0_por[] = { + { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x40c01343 }, + { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642c }, + { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x80040800 }, + { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 }, + { .offset = SDCC_USR_CTL, .value = 0x00010800 }, + { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 }, +}; + +static const struct ethqos_emac_driver_data emac_v4_0_0_data = { + .por = emac_v4_0_0_por, + .num_por = ARRAY_SIZE(emac_v3_0_0_por), + .rgmii_config_loopback_en = false, + .has_emac_ge_3 = true, + .has_integrated_pcs = true, .dwmac4_addrs = { .dma_chan = 0x00008100, .dma_chan_offset = 0x1000, @@ -276,7 +310,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN, SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG); - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_MCLK_GATING_EN, 0, SDCC_HC_REG_DLL_CONFIG); @@ -317,7 +351,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_HC_REG_DLL_CONFIG2); - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS, 0, SDCC_HC_REG_DLL_CONFIG2); @@ -387,7 +421,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) /* PRG_RCLK_DLY = TCXO period * TCXO_CYCLES_CNT / 2 * RX delay ns, * in practice this becomes PRG_RCLK_DLY = 52 * 4 / 2 * RX delay ns */ - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { /* 0.9 ns */ rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY, 115, SDCC_HC_REG_DDR_CONFIG); @@ -422,7 +456,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -462,7 +496,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) RGMII_IO_MACRO_CONFIG); rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -512,7 +546,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN, SDCC_DLL_CONFIG_PDN, SDCC_HC_REG_DLL_CONFIG); - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { if (ethqos->speed == SPEED_1000) { rgmii_writel(ethqos, 0x1800000, SDCC_TEST_CTL); rgmii_writel(ethqos, 0x2C010800, SDCC_USR_CTL); @@ -542,7 +576,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos) SDCC_HC_REG_DLL_CONFIG); /* Set USR_CTL bit 26 with mask of 3 bits */ - if (!ethqos->has_emac3) + if (!ethqos->has_emac_ge_3) rgmii_updatel(ethqos, GENMASK(26, 24), BIT(26), SDCC_USR_CTL); @@ -729,7 +763,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) ethqos->por = data->por; ethqos->num_por = data->num_por; ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en; - ethqos->has_emac3 = data->has_emac3; + ethqos->has_emac_ge_3 = data->has_emac_ge_3; ethqos->rgmii_clk = devm_clk_get_optional(dev, "rgmii"); if (IS_ERR(ethqos->rgmii_clk)) { @@ -769,12 +803,13 @@ static int qcom_ethqos_probe(struct platform_device *pdev) plat_dat->fix_mac_speed = ethqos_fix_mac_speed; plat_dat->dump_debug_regs = rgmii_dump; plat_dat->has_gmac4 = 1; - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) plat_dat->dwmac4_addrs = &data->dwmac4_addrs; plat_dat->pmt = 1; plat_dat->tso_en = of_property_read_bool(np, "snps,tso"); if (of_device_is_compatible(np, "qcom,qcs404-ethqos")) plat_dat->rx_clk_runs_in_lpi = 1; + plat_dat->has_integrated_pcs = data->has_integrated_pcs; if (ethqos->serdes_phy) { plat_dat->serdes_powerup = qcom_ethqos_serdes_powerup; @@ -795,6 +830,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) static const struct of_device_id qcom_ethqos_match[] = { { .compatible = "qcom,qcs404-ethqos", .data = &emac_v2_3_0_data}, + { .compatible = "qcom,sa8775p-ethqos", .data = &emac_v4_0_0_data}, { .compatible = "qcom,sc8280xp-ethqos", .data = &emac_v3_0_0_data}, { .compatible = "qcom,sm8150-ethqos", .data = &emac_v2_1_0_data}, { } -- 2.39.2 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2023-06-12 9:32 UTC|newest] Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-06-12 9:23 [PATCH 00/26] arm64: qcom: sa8775p-ride: enable the first ethernet port Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 9:23 ` [PATCH 01/26] phy: qualcomm: fix indentation in Makefile Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 17:20 ` Andrew Halaney 2023-06-12 17:20 ` Andrew Halaney 2023-06-12 17:20 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 02/26] dt-bindings: phy: describe the Qualcomm SGMII PHY Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-14 7:13 ` Krzysztof Kozlowski 2023-06-14 7:13 ` Krzysztof Kozlowski 2023-06-14 7:13 ` Krzysztof Kozlowski 2023-06-12 9:23 ` [PATCH 03/26] phy: qcom: add the SGMII SerDes PHY driver Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 9:45 ` Konrad Dybcio 2023-06-12 9:45 ` Konrad Dybcio 2023-06-14 7:18 ` Bartosz Golaszewski 2023-06-14 7:18 ` Bartosz Golaszewski 2023-06-14 7:18 ` Bartosz Golaszewski 2023-06-13 17:39 ` Bjorn Andersson 2023-06-13 17:39 ` Bjorn Andersson 2023-06-13 17:39 ` Bjorn Andersson 2023-06-12 9:23 ` [PATCH 04/26] arm64: defconfig: enable the SerDes PHY for Qualcomm DWMAC Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-14 7:13 ` Krzysztof Kozlowski 2023-06-14 7:13 ` Krzysztof Kozlowski 2023-06-14 7:13 ` Krzysztof Kozlowski 2023-06-12 9:23 ` [PATCH 05/26] net: stmmac: dwmac-qcom-ethqos: shrink clock code with devres Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 18:22 ` Andrew Halaney 2023-06-12 18:22 ` Andrew Halaney 2023-06-12 18:22 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 06/26] net: stmmac: dwmac-qcom-ethqos: rename a label in probe() Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 18:32 ` Andrew Halaney 2023-06-12 18:32 ` Andrew Halaney 2023-06-12 18:32 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 07/26] net: stmmac: dwmac-qcom-ethqos: tweak the order of local variables Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 18:34 ` Andrew Halaney 2023-06-12 18:34 ` Andrew Halaney 2023-06-12 18:34 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 08/26] net: stmmac: dwmac-qcom-ethqos: use a helper variable for &pdev->dev Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 18:38 ` Andrew Halaney 2023-06-12 18:38 ` Andrew Halaney 2023-06-12 18:38 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 09/26] net: stmmac: dwmac-qcom-ethqos: add missing include Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 20:06 ` Andrew Halaney 2023-06-12 20:06 ` Andrew Halaney 2023-06-12 20:06 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 10/26] net: stmmac: dwmac-qcom-ethqos: add a newline between headers Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 20:06 ` Andrew Halaney 2023-06-12 20:06 ` Andrew Halaney 2023-06-12 20:06 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 11/26] net: stmmac: dwmac-qcom-ethqos: remove stray space Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 20:07 ` Andrew Halaney 2023-06-12 20:07 ` Andrew Halaney 2023-06-12 20:07 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 12/26] net: stmmac: dwmac-qcom-ethqos: add support for the optional serdes phy Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 20:32 ` Andrew Halaney 2023-06-12 20:32 ` Andrew Halaney 2023-06-12 20:32 ` Andrew Halaney 2023-06-13 7:52 ` Bartosz Golaszewski 2023-06-13 7:52 ` Bartosz Golaszewski 2023-06-13 7:52 ` Bartosz Golaszewski 2023-06-12 9:23 ` [PATCH 13/26] net: stmmac: dwmac-qcom-ethqos: make the rgmii clock optional Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 20:40 ` Andrew Halaney 2023-06-12 20:40 ` Andrew Halaney 2023-06-12 20:40 ` Andrew Halaney 2023-06-13 7:58 ` Bartosz Golaszewski 2023-06-13 7:58 ` Bartosz Golaszewski 2023-06-13 7:58 ` Bartosz Golaszewski 2023-06-12 9:23 ` [PATCH 14/26] net: stmmac: dwmac-qcom-ethqos: add optional phyaux clock Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 20:42 ` Andrew Halaney 2023-06-12 20:42 ` Andrew Halaney 2023-06-12 20:42 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 15/26] net: stmmac: dwmac-qcom-ethqos: add support for the optional phy-supply Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 21:06 ` Andrew Halaney 2023-06-12 21:06 ` Andrew Halaney 2023-06-12 21:06 ` Andrew Halaney 2023-06-13 9:02 ` Bartosz Golaszewski 2023-06-13 9:02 ` Bartosz Golaszewski 2023-06-13 9:02 ` Bartosz Golaszewski 2023-06-12 9:23 ` [PATCH 16/26] net: stmmac: dwmac-qcom-ethqos: prepare the driver for more PHY modes Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-13 16:59 ` Andrew Halaney 2023-06-13 16:59 ` Andrew Halaney 2023-06-13 16:59 ` Andrew Halaney 2023-06-12 9:23 ` [PATCH 17/26] net: stmmac: dwmac-qcom-ethqos: add support for SGMII Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 9:23 ` [PATCH 18/26] net: stmmac: add new switch to struct plat_stmmacenet_data Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 9:49 ` Jose Abreu 2023-06-12 9:49 ` Jose Abreu 2023-06-12 9:23 ` [PATCH 19/26] dt-bindings: net: snps,dwmac: add compatible for sa8775p ethqos Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-14 7:23 ` Krzysztof Kozlowski 2023-06-14 7:23 ` Krzysztof Kozlowski 2023-06-14 7:23 ` Krzysztof Kozlowski 2023-06-12 9:23 ` [PATCH 20/26] dt-bindings: net: qcom,ethqos: add description for sa8775p Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-14 7:25 ` Krzysztof Kozlowski 2023-06-14 7:25 ` Krzysztof Kozlowski 2023-06-14 7:25 ` Krzysztof Kozlowski 2023-06-14 7:28 ` Bartosz Golaszewski 2023-06-14 7:28 ` Bartosz Golaszewski 2023-06-14 7:28 ` Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski [this message] 2023-06-12 9:23 ` [PATCH 21/26] net: stmmac: dwmac-qcom-ethqos: add support for emac4 on sa8775p platforms Bartosz Golaszewski 2023-06-12 9:23 ` [PATCH 22/26] arm64: dts: qcom: sa8775p-ride: add the SGMII PHY node Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-12 9:35 ` Konrad Dybcio 2023-06-12 9:35 ` Konrad Dybcio 2023-06-12 9:23 ` [PATCH 23/26] arm64: dts: qcom: sa8775p: add the first 1Gb ethernet interface Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-13 18:57 ` Konrad Dybcio 2023-06-13 18:57 ` Konrad Dybcio 2023-06-13 18:57 ` Konrad Dybcio 2023-06-12 9:23 ` [PATCH 24/26] arm64: dts: qcom: sa8775p-ride: enable the SerDes PHY Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-13 19:02 ` Konrad Dybcio 2023-06-13 19:02 ` Konrad Dybcio 2023-06-13 19:02 ` Konrad Dybcio 2023-06-14 14:51 ` Bjorn Andersson 2023-06-14 14:51 ` Bjorn Andersson 2023-06-14 14:51 ` Bjorn Andersson 2023-06-12 9:23 ` [PATCH 25/26] arm64: dts: qcom: sa8775p-ride: add pin functions for ethernet0 Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-13 19:04 ` Konrad Dybcio 2023-06-13 19:04 ` Konrad Dybcio 2023-06-13 19:04 ` Konrad Dybcio 2023-06-12 9:23 ` [PATCH 26/26] arm64: dts: qcom: sa8775p-ride: enable ethernet0 Bartosz Golaszewski 2023-06-12 9:23 ` Bartosz Golaszewski 2023-06-13 19:08 ` Konrad Dybcio 2023-06-13 19:08 ` Konrad Dybcio 2023-06-13 19:08 ` Konrad Dybcio
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230612092355.87937-22-brgl@bgdev.pl \ --to=brgl@bgdev.pl \ --cc=agross@kernel.org \ --cc=alexandre.torgue@foss.st.com \ --cc=andersson@kernel.org \ --cc=bartosz.golaszewski@linaro.org \ --cc=bhupesh.sharma@linaro.org \ --cc=conor+dt@kernel.org \ --cc=davem@davemloft.net \ --cc=devicetree@vger.kernel.org \ --cc=edumazet@google.com \ --cc=joabreu@synopsys.com \ --cc=kishon@kernel.org \ --cc=konrad.dybcio@linaro.org \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=kuba@kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-arm-msm@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-phy@lists.infradead.org \ --cc=linux-stm32@st-md-mailman.stormreply.com \ --cc=netdev@vger.kernel.org \ --cc=pabeni@redhat.com \ --cc=peppe.cavallaro@st.com \ --cc=robh+dt@kernel.org \ --cc=vkoul@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.