From: Ravi Bangoria <ravi.bangoria@amd.com>
To: <acme@kernel.org>
Cc: <ravi.bangoria@amd.com>, <irogers@google.com>, <jolsa@kernel.org>,
<namhyung@kernel.org>, <mark.rutland@arm.com>,
<peterz@infradead.org>, <adrian.hunter@intel.com>,
<kan.liang@linux.intel.com>, <james.clark@arm.com>,
<alisaidi@amazon.com>, <leo.yan@linaro.org>,
<maddy@linux.ibm.com>, <linux-perf-users@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <sandipan.das@amd.com>,
<ananth.narayan@amd.com>, <santosh.shukla@amd.com>
Subject: [PATCH 0/4] perf mem amd: Fix few logic bugs
Date: Tue, 13 Jun 2023 15:25:02 +0530 [thread overview]
Message-ID: <20230613095506.547-1-ravi.bangoria@amd.com> (raw)
Recent pmu refactoring changes[1] introduced a notion of core vs other
pmus and made perf mem/c2c code depend only on core pmus, which is
logically wrong for AMD as perf mem/c2c on AMD depends on IBS OP pmu,
not the core pmu. Although user visible perf mem/c2c functionality is
still working fine, internal code logic is wrong. Fix those.
[1] https://lore.kernel.org/r/20230527072210.2900565-1-irogers@google.com
Ravi Bangoria (4):
perf pmus: Describe semantics of 'core_pmus' and 'other_pmus'
perf tool x86: Consolidate is_amd check into single function
perf mem amd: Fix perf_pmus__num_mem_pmus()
perf mem amd: Scan all PMUs instead of just core ones
tools/perf/arch/x86/util/Build | 1 +
tools/perf/arch/x86/util/env.c | 19 +++++++++++++++++++
tools/perf/arch/x86/util/env.h | 7 +++++++
tools/perf/arch/x86/util/evsel.c | 16 ++--------------
tools/perf/arch/x86/util/mem-events.c | 24 +++++++-----------------
tools/perf/arch/x86/util/pmu.c | 15 +++++++++++++++
tools/perf/util/mem-events.c | 16 ++++++++++++----
tools/perf/util/mem-events.h | 1 +
tools/perf/util/pmus.c | 15 ++++++++++++++-
9 files changed, 78 insertions(+), 36 deletions(-)
create mode 100644 tools/perf/arch/x86/util/env.c
create mode 100644 tools/perf/arch/x86/util/env.h
--
2.40.1
next reply other threads:[~2023-06-13 9:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-13 9:55 Ravi Bangoria [this message]
2023-06-13 9:55 ` [PATCH 1/4] perf pmus: Describe semantics of 'core_pmus' and 'other_pmus' Ravi Bangoria
2023-06-13 9:55 ` [PATCH 2/4] perf tool x86: Consolidate is_amd check into single function Ravi Bangoria
2023-06-13 19:49 ` Arnaldo Carvalho de Melo
2023-06-13 19:49 ` Ian Rogers
2023-06-13 20:28 ` Arnaldo Carvalho de Melo
2023-06-13 9:55 ` [PATCH 3/4] perf mem amd: Fix perf_pmus__num_mem_pmus() Ravi Bangoria
2023-06-13 15:25 ` Ian Rogers
2023-06-14 3:49 ` Ravi Bangoria
2023-06-13 9:55 ` [PATCH 4/4] perf mem amd: Scan all PMUs instead of just core ones Ravi Bangoria
2023-06-13 15:34 ` Ian Rogers
2023-06-14 3:58 ` Ravi Bangoria
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230613095506.547-1-ravi.bangoria@amd.com \
--to=ravi.bangoria@amd.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=alisaidi@amazon.com \
--cc=ananth.narayan@amd.com \
--cc=irogers@google.com \
--cc=james.clark@arm.com \
--cc=jolsa@kernel.org \
--cc=kan.liang@linux.intel.com \
--cc=leo.yan@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=maddy@linux.ibm.com \
--cc=mark.rutland@arm.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=sandipan.das@amd.com \
--cc=santosh.shukla@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.