From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Subject: [PATCH] drm/i915: Remove some dead "code" Date: Wed, 5 Jul 2023 10:55:18 +0100 [thread overview] Message-ID: <20230705095518.3690951-1-tvrtko.ursulin@linux.intel.com> (raw) From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Commit 2caffbf11762 ("drm/i915: Revoke mmaps and prevent access to fence registers across reset") removed the temporary implementation of a reset under stop machine but forgot to remove this one commented out define. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/gt/intel_reset.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c index 6916eba3bd33..cdbc08dad7ae 100644 --- a/drivers/gpu/drm/i915/gt/intel_reset.c +++ b/drivers/gpu/drm/i915/gt/intel_reset.c @@ -35,9 +35,6 @@ #define RESET_MAX_RETRIES 3 -/* XXX How to handle concurrent GGTT updates using tiling registers? */ -#define RESET_UNDER_STOP_MACHINE 0 - static void client_mark_guilty(struct i915_gem_context *ctx, bool banned) { struct drm_i915_file_private *file_priv = ctx->file_priv; -- 2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH] drm/i915: Remove some dead "code" Date: Wed, 5 Jul 2023 10:55:18 +0100 [thread overview] Message-ID: <20230705095518.3690951-1-tvrtko.ursulin@linux.intel.com> (raw) From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Commit 2caffbf11762 ("drm/i915: Revoke mmaps and prevent access to fence registers across reset") removed the temporary implementation of a reset under stop machine but forgot to remove this one commented out define. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/gt/intel_reset.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c index 6916eba3bd33..cdbc08dad7ae 100644 --- a/drivers/gpu/drm/i915/gt/intel_reset.c +++ b/drivers/gpu/drm/i915/gt/intel_reset.c @@ -35,9 +35,6 @@ #define RESET_MAX_RETRIES 3 -/* XXX How to handle concurrent GGTT updates using tiling registers? */ -#define RESET_UNDER_STOP_MACHINE 0 - static void client_mark_guilty(struct i915_gem_context *ctx, bool banned) { struct drm_i915_file_private *file_priv = ctx->file_priv; -- 2.39.2
next reply other threads:[~2023-07-05 9:55 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-07-05 9:55 Tvrtko Ursulin [this message] 2023-07-05 9:55 ` [Intel-gfx] [PATCH] drm/i915: Remove some dead "code" Tvrtko Ursulin 2023-07-05 12:08 ` Jani Nikula 2023-07-05 12:08 ` [Intel-gfx] " Jani Nikula 2023-07-06 10:58 ` Tvrtko Ursulin 2023-07-06 10:58 ` [Intel-gfx] " Tvrtko Ursulin 2023-07-05 14:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork 2023-07-06 7:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove some dead "code" (rev2) Patchwork 2023-07-06 10:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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