All of lore.kernel.org
 help / color / mirror / Atom feed
From: Gatien Chevallier <gatien.chevallier@foss.st.com>
To: <Oleksii_Moisieiev@epam.com>, <gregkh@linuxfoundation.org>,
	<herbert@gondor.apana.org.au>, <davem@davemloft.net>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <alexandre.torgue@foss.st.com>,
	<vkoul@kernel.org>, <jic23@kernel.org>,
	<olivier.moysan@foss.st.com>, <arnaud.pouliquen@foss.st.com>,
	<mchehab@kernel.org>, <fabrice.gasnier@foss.st.com>,
	<andi.shyti@kernel.org>, <ulf.hansson@linaro.org>,
	<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
	<hugues.fruchet@foss.st.com>, <lee@kernel.org>, <will@kernel.org>,
	<catalin.marinas@arm.com>, <arnd@kernel.org>,
	<richardcochran@gmail.com>
Cc: <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <dmaengine@vger.kernel.org>,
	<linux-i2c@vger.kernel.org>, <linux-iio@vger.kernel.org>,
	<alsa-devel@alsa-project.org>, <linux-media@vger.kernel.org>,
	<linux-mmc@vger.kernel.org>, <netdev@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-serial@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org>,
	Gatien Chevallier <gatien.chevallier@foss.st.com>
Subject: [PATCH 00/10] Introduce STM32 Firewall framework
Date: Wed, 5 Jul 2023 19:27:49 +0200	[thread overview]
Message-ID: <20230705172759.1610753-1-gatien.chevallier@foss.st.com> (raw)

Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.

This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/

The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ... 

Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.

On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.

The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.

For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.

The firewall framework relies on the feature-domain-controller device
tree bindings: https://lore.kernel.org/lkml/0c0a82bb-18ae-d057-562b.
It is used by peripherals to reference a domain controller, in this
case a firewall feature domain. The bus uses the ID referenced by
the feature-domains property to know where to look in the firewall
to get the security configuration for the peripheral. This allows
a device tree description rather than a hardcoded peripheral table
in the bus driver.

The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.

The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.

STM32MP13/15/25 SoC device tree files are updated in this series to
implement this mecanism.

Oleksii Moisieiev (1):
  dt-bindings: Document common device controller bindings

Gatien Chevallier (9):
  dt-bindings: bus: add device tree bindings for RIFSC
  dt-bindings: bus: add device tree bindings for ETZPC
  dt-bindings: treewide: add feature-domains description in binding
    files
  firewall: introduce stm32_firewall framework
  bus: rifsc: introduce RIFSC firewall controller driver
  arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards
  bus: etzpc: introduce ETZPC firewall controller driver
  ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards
  ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards

 .../bindings/bus/st,stm32-etzpc.yaml          |   90 +
 .../bindings/bus/st,stm32-rifsc.yaml          |  101 +
 .../bindings/crypto/st,stm32-hash.yaml        |    4 +
 .../devicetree/bindings/dma/st,stm32-dma.yaml |    4 +
 .../bindings/dma/st,stm32-dmamux.yaml         |    4 +
 .../feature-domain-controller.yaml            |   84 +
 .../devicetree/bindings/i2c/st,stm32-i2c.yaml |    4 +
 .../bindings/iio/adc/st,stm32-adc.yaml        |    4 +
 .../bindings/iio/adc/st,stm32-dfsdm-adc.yaml  |    4 +
 .../bindings/iio/dac/st,stm32-dac.yaml        |    4 +
 .../bindings/media/cec/st,stm32-cec.yaml      |    4 +
 .../bindings/media/st,stm32-dcmi.yaml         |    4 +
 .../memory-controllers/st,stm32-fmc2-ebi.yaml |    4 +
 .../bindings/mfd/st,stm32-lptimer.yaml        |    4 +
 .../bindings/mfd/st,stm32-timers.yaml         |    5 +
 .../devicetree/bindings/mmc/arm,pl18x.yaml    |    4 +
 .../devicetree/bindings/net/stm32-dwmac.yaml  |    4 +
 .../bindings/phy/phy-stm32-usbphyc.yaml       |    4 +
 .../bindings/regulator/st,stm32-vrefbuf.yaml  |    4 +
 .../devicetree/bindings/rng/st,stm32-rng.yaml |    4 +
 .../bindings/serial/st,stm32-uart.yaml        |    4 +
 .../bindings/sound/st,stm32-i2s.yaml          |    4 +
 .../bindings/sound/st,stm32-sai.yaml          |    4 +
 .../bindings/sound/st,stm32-spdifrx.yaml      |    4 +
 .../bindings/spi/st,stm32-qspi.yaml           |    4 +
 .../devicetree/bindings/spi/st,stm32-spi.yaml |    4 +
 .../devicetree/bindings/usb/dwc2.yaml         |    4 +
 MAINTAINERS                                   |    7 +
 arch/arm/boot/dts/st/stm32mp131.dtsi          | 1027 +++---
 arch/arm/boot/dts/st/stm32mp133.dtsi          |   51 +-
 arch/arm/boot/dts/st/stm32mp13xc.dtsi         |   19 +-
 arch/arm/boot/dts/st/stm32mp13xf.dtsi         |   19 +-
 arch/arm/boot/dts/st/stm32mp151.dtsi          | 2757 +++++++++--------
 arch/arm/boot/dts/st/stm32mp153.dtsi          |   52 +-
 arch/arm/boot/dts/st/stm32mp15xc.dtsi         |   19 +-
 arch/arm64/Kconfig.platforms                  |    1 +
 arch/arm64/boot/dts/st/stm32mp251.dtsi        |    5 +-
 drivers/bus/Kconfig                           |   10 +
 drivers/bus/Makefile                          |    1 +
 drivers/bus/stm32_etzpc.c                     |  137 +
 drivers/bus/stm32_firewall.c                  |  252 ++
 drivers/bus/stm32_firewall.h                  |   83 +
 drivers/bus/stm32_rifsc.c                     |  248 ++
 include/linux/bus/stm32_firewall_device.h     |  134 +
 44 files changed, 3276 insertions(+), 1918 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml
 create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-rifsc.yaml
 create mode 100644 Documentation/devicetree/bindings/feature-controllers/feature-domain-controller.yaml
 create mode 100644 drivers/bus/stm32_etzpc.c
 create mode 100644 drivers/bus/stm32_firewall.c
 create mode 100644 drivers/bus/stm32_firewall.h
 create mode 100644 drivers/bus/stm32_rifsc.c
 create mode 100644 include/linux/bus/stm32_firewall_device.h

-- 
2.25.1


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Gatien Chevallier <gatien.chevallier@foss.st.com>
To: <Oleksii_Moisieiev@epam.com>, <gregkh@linuxfoundation.org>,
	<herbert@gondor.apana.org.au>, <davem@davemloft.net>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <alexandre.torgue@foss.st.com>,
	<vkoul@kernel.org>, <jic23@kernel.org>,
	<olivier.moysan@foss.st.com>, <arnaud.pouliquen@foss.st.com>,
	<mchehab@kernel.org>, <fabrice.gasnier@foss.st.com>,
	<andi.shyti@kernel.org>, <ulf.hansson@linaro.org>,
	<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
	<hugues.fruchet@foss.st.com>, <lee@kernel.org>, <will@kernel.org>,
	<catalin.marinas@arm.com>, <arnd@kernel.org>,
	<richardcochran@gmail.com>
Cc: <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <dmaengine@vger.kernel.org>,
	<linux-i2c@vger.kernel.org>, <linux-iio@vger.kernel.org>,
	<alsa-devel@alsa-project.org>, <linux-media@vger.kernel.org>,
	<linux-mmc@vger.kernel.org>, <netdev@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-serial@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org>,
	Gatien Chevallier <gatien.chevallier@foss.st.com>
Subject: [PATCH 00/10] Introduce STM32 Firewall framework
Date: Wed, 5 Jul 2023 19:27:49 +0200	[thread overview]
Message-ID: <20230705172759.1610753-1-gatien.chevallier@foss.st.com> (raw)

Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.

This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/

The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ... 

Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.

On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.

The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.

For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.

The firewall framework relies on the feature-domain-controller device
tree bindings: https://lore.kernel.org/lkml/0c0a82bb-18ae-d057-562b.
It is used by peripherals to reference a domain controller, in this
case a firewall feature domain. The bus uses the ID referenced by
the feature-domains property to know where to look in the firewall
to get the security configuration for the peripheral. This allows
a device tree description rather than a hardcoded peripheral table
in the bus driver.

The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.

The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.

STM32MP13/15/25 SoC device tree files are updated in this series to
implement this mecanism.

Oleksii Moisieiev (1):
  dt-bindings: Document common device controller bindings

Gatien Chevallier (9):
  dt-bindings: bus: add device tree bindings for RIFSC
  dt-bindings: bus: add device tree bindings for ETZPC
  dt-bindings: treewide: add feature-domains description in binding
    files
  firewall: introduce stm32_firewall framework
  bus: rifsc: introduce RIFSC firewall controller driver
  arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards
  bus: etzpc: introduce ETZPC firewall controller driver
  ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards
  ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards

 .../bindings/bus/st,stm32-etzpc.yaml          |   90 +
 .../bindings/bus/st,stm32-rifsc.yaml          |  101 +
 .../bindings/crypto/st,stm32-hash.yaml        |    4 +
 .../devicetree/bindings/dma/st,stm32-dma.yaml |    4 +
 .../bindings/dma/st,stm32-dmamux.yaml         |    4 +
 .../feature-domain-controller.yaml            |   84 +
 .../devicetree/bindings/i2c/st,stm32-i2c.yaml |    4 +
 .../bindings/iio/adc/st,stm32-adc.yaml        |    4 +
 .../bindings/iio/adc/st,stm32-dfsdm-adc.yaml  |    4 +
 .../bindings/iio/dac/st,stm32-dac.yaml        |    4 +
 .../bindings/media/cec/st,stm32-cec.yaml      |    4 +
 .../bindings/media/st,stm32-dcmi.yaml         |    4 +
 .../memory-controllers/st,stm32-fmc2-ebi.yaml |    4 +
 .../bindings/mfd/st,stm32-lptimer.yaml        |    4 +
 .../bindings/mfd/st,stm32-timers.yaml         |    5 +
 .../devicetree/bindings/mmc/arm,pl18x.yaml    |    4 +
 .../devicetree/bindings/net/stm32-dwmac.yaml  |    4 +
 .../bindings/phy/phy-stm32-usbphyc.yaml       |    4 +
 .../bindings/regulator/st,stm32-vrefbuf.yaml  |    4 +
 .../devicetree/bindings/rng/st,stm32-rng.yaml |    4 +
 .../bindings/serial/st,stm32-uart.yaml        |    4 +
 .../bindings/sound/st,stm32-i2s.yaml          |    4 +
 .../bindings/sound/st,stm32-sai.yaml          |    4 +
 .../bindings/sound/st,stm32-spdifrx.yaml      |    4 +
 .../bindings/spi/st,stm32-qspi.yaml           |    4 +
 .../devicetree/bindings/spi/st,stm32-spi.yaml |    4 +
 .../devicetree/bindings/usb/dwc2.yaml         |    4 +
 MAINTAINERS                                   |    7 +
 arch/arm/boot/dts/st/stm32mp131.dtsi          | 1027 +++---
 arch/arm/boot/dts/st/stm32mp133.dtsi          |   51 +-
 arch/arm/boot/dts/st/stm32mp13xc.dtsi         |   19 +-
 arch/arm/boot/dts/st/stm32mp13xf.dtsi         |   19 +-
 arch/arm/boot/dts/st/stm32mp151.dtsi          | 2757 +++++++++--------
 arch/arm/boot/dts/st/stm32mp153.dtsi          |   52 +-
 arch/arm/boot/dts/st/stm32mp15xc.dtsi         |   19 +-
 arch/arm64/Kconfig.platforms                  |    1 +
 arch/arm64/boot/dts/st/stm32mp251.dtsi        |    5 +-
 drivers/bus/Kconfig                           |   10 +
 drivers/bus/Makefile                          |    1 +
 drivers/bus/stm32_etzpc.c                     |  137 +
 drivers/bus/stm32_firewall.c                  |  252 ++
 drivers/bus/stm32_firewall.h                  |   83 +
 drivers/bus/stm32_rifsc.c                     |  248 ++
 include/linux/bus/stm32_firewall_device.h     |  134 +
 44 files changed, 3276 insertions(+), 1918 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml
 create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-rifsc.yaml
 create mode 100644 Documentation/devicetree/bindings/feature-controllers/feature-domain-controller.yaml
 create mode 100644 drivers/bus/stm32_etzpc.c
 create mode 100644 drivers/bus/stm32_firewall.c
 create mode 100644 drivers/bus/stm32_firewall.h
 create mode 100644 drivers/bus/stm32_rifsc.c
 create mode 100644 include/linux/bus/stm32_firewall_device.h

-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Gatien Chevallier <gatien.chevallier@foss.st.com>
To: <Oleksii_Moisieiev@epam.com>, <gregkh@linuxfoundation.org>,
	<herbert@gondor.apana.org.au>, <davem@davemloft.net>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <alexandre.torgue@foss.st.com>,
	<vkoul@kernel.org>, <jic23@kernel.org>,
	<olivier.moysan@foss.st.com>, <arnaud.pouliquen@foss.st.com>,
	<mchehab@kernel.org>, <fabrice.gasnier@foss.st.com>,
	<andi.shyti@kernel.org>, <ulf.hansson@linaro.org>,
	<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
	<hugues.fruchet@foss.st.com>, <lee@kernel.org>, <will@kernel.org>,
	<catalin.marinas@arm.com>, <arnd@kernel.org>,
	<richardcochran@gmail.com>
Cc: <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <dmaengine@vger.kernel.org>,
	<linux-i2c@vger.kernel.org>, <linux-iio@vger.kernel.org>,
	<alsa-devel@alsa-project.org>, <linux-media@vger.kernel.org>,
	<linux-mmc@vger.kernel.org>, <netdev@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-serial@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <linux-usb@vger.kernel.org>,
	Gatien Chevallier <gatien.chevallier@foss.st.com>
Subject: [PATCH 00/10] Introduce STM32 Firewall framework
Date: Wed, 5 Jul 2023 19:27:49 +0200	[thread overview]
Message-ID: <20230705172759.1610753-1-gatien.chevallier@foss.st.com> (raw)

Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.

This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/

The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ... 

Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.

On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.

The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.

For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.

The firewall framework relies on the feature-domain-controller device
tree bindings: https://lore.kernel.org/lkml/0c0a82bb-18ae-d057-562b.
It is used by peripherals to reference a domain controller, in this
case a firewall feature domain. The bus uses the ID referenced by
the feature-domains property to know where to look in the firewall
to get the security configuration for the peripheral. This allows
a device tree description rather than a hardcoded peripheral table
in the bus driver.

The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.

The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.

STM32MP13/15/25 SoC device tree files are updated in this series to
implement this mecanism.

Oleksii Moisieiev (1):
  dt-bindings: Document common device controller bindings

Gatien Chevallier (9):
  dt-bindings: bus: add device tree bindings for RIFSC
  dt-bindings: bus: add device tree bindings for ETZPC
  dt-bindings: treewide: add feature-domains description in binding
    files
  firewall: introduce stm32_firewall framework
  bus: rifsc: introduce RIFSC firewall controller driver
  arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards
  bus: etzpc: introduce ETZPC firewall controller driver
  ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards
  ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards

 .../bindings/bus/st,stm32-etzpc.yaml          |   90 +
 .../bindings/bus/st,stm32-rifsc.yaml          |  101 +
 .../bindings/crypto/st,stm32-hash.yaml        |    4 +
 .../devicetree/bindings/dma/st,stm32-dma.yaml |    4 +
 .../bindings/dma/st,stm32-dmamux.yaml         |    4 +
 .../feature-domain-controller.yaml            |   84 +
 .../devicetree/bindings/i2c/st,stm32-i2c.yaml |    4 +
 .../bindings/iio/adc/st,stm32-adc.yaml        |    4 +
 .../bindings/iio/adc/st,stm32-dfsdm-adc.yaml  |    4 +
 .../bindings/iio/dac/st,stm32-dac.yaml        |    4 +
 .../bindings/media/cec/st,stm32-cec.yaml      |    4 +
 .../bindings/media/st,stm32-dcmi.yaml         |    4 +
 .../memory-controllers/st,stm32-fmc2-ebi.yaml |    4 +
 .../bindings/mfd/st,stm32-lptimer.yaml        |    4 +
 .../bindings/mfd/st,stm32-timers.yaml         |    5 +
 .../devicetree/bindings/mmc/arm,pl18x.yaml    |    4 +
 .../devicetree/bindings/net/stm32-dwmac.yaml  |    4 +
 .../bindings/phy/phy-stm32-usbphyc.yaml       |    4 +
 .../bindings/regulator/st,stm32-vrefbuf.yaml  |    4 +
 .../devicetree/bindings/rng/st,stm32-rng.yaml |    4 +
 .../bindings/serial/st,stm32-uart.yaml        |    4 +
 .../bindings/sound/st,stm32-i2s.yaml          |    4 +
 .../bindings/sound/st,stm32-sai.yaml          |    4 +
 .../bindings/sound/st,stm32-spdifrx.yaml      |    4 +
 .../bindings/spi/st,stm32-qspi.yaml           |    4 +
 .../devicetree/bindings/spi/st,stm32-spi.yaml |    4 +
 .../devicetree/bindings/usb/dwc2.yaml         |    4 +
 MAINTAINERS                                   |    7 +
 arch/arm/boot/dts/st/stm32mp131.dtsi          | 1027 +++---
 arch/arm/boot/dts/st/stm32mp133.dtsi          |   51 +-
 arch/arm/boot/dts/st/stm32mp13xc.dtsi         |   19 +-
 arch/arm/boot/dts/st/stm32mp13xf.dtsi         |   19 +-
 arch/arm/boot/dts/st/stm32mp151.dtsi          | 2757 +++++++++--------
 arch/arm/boot/dts/st/stm32mp153.dtsi          |   52 +-
 arch/arm/boot/dts/st/stm32mp15xc.dtsi         |   19 +-
 arch/arm64/Kconfig.platforms                  |    1 +
 arch/arm64/boot/dts/st/stm32mp251.dtsi        |    5 +-
 drivers/bus/Kconfig                           |   10 +
 drivers/bus/Makefile                          |    1 +
 drivers/bus/stm32_etzpc.c                     |  137 +
 drivers/bus/stm32_firewall.c                  |  252 ++
 drivers/bus/stm32_firewall.h                  |   83 +
 drivers/bus/stm32_rifsc.c                     |  248 ++
 include/linux/bus/stm32_firewall_device.h     |  134 +
 44 files changed, 3276 insertions(+), 1918 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml
 create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-rifsc.yaml
 create mode 100644 Documentation/devicetree/bindings/feature-controllers/feature-domain-controller.yaml
 create mode 100644 drivers/bus/stm32_etzpc.c
 create mode 100644 drivers/bus/stm32_firewall.c
 create mode 100644 drivers/bus/stm32_firewall.h
 create mode 100644 drivers/bus/stm32_rifsc.c
 create mode 100644 include/linux/bus/stm32_firewall_device.h

-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

             reply	other threads:[~2023-07-05 17:29 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-05 17:27 Gatien Chevallier [this message]
2023-07-05 17:27 ` [PATCH 00/10] Introduce STM32 Firewall framework Gatien Chevallier
2023-07-05 17:27 ` Gatien Chevallier
2023-07-05 17:27 ` [IGNORE][PATCH 01/10] dt-bindings: Document common device controller bindings Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 19:39   ` Rob Herring
2023-07-05 19:39     ` Rob Herring
2023-07-05 19:39     ` Rob Herring
2023-07-05 17:27 ` [PATCH 02/10] dt-bindings: bus: add device tree bindings for RIFSC Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 19:39   ` Rob Herring
2023-07-05 19:39     ` Rob Herring
2023-07-05 19:39     ` Rob Herring
2023-07-06  6:28   ` Krzysztof Kozlowski
2023-07-06  6:28     ` Krzysztof Kozlowski
2023-07-06  6:28     ` Krzysztof Kozlowski
2023-07-06  9:29     ` Gatien CHEVALLIER
2023-07-06  9:29       ` Gatien CHEVALLIER
2023-07-06  9:29       ` Gatien CHEVALLIER
2023-07-20 14:58       ` Gatien CHEVALLIER
2023-07-20 14:58         ` Gatien CHEVALLIER
2023-07-20 14:58         ` Gatien CHEVALLIER
2023-07-05 17:27 ` [PATCH 03/10] dt-bindings: bus: add device tree bindings for ETZPC Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 19:39   ` Rob Herring
2023-07-05 19:39     ` Rob Herring
2023-07-05 19:39     ` Rob Herring
2023-07-05 17:27 ` [PATCH 04/10] dt-bindings: treewide: add feature-domains description in binding files Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-06 14:51   ` Rob Herring
2023-07-06 14:51     ` Rob Herring
2023-07-06 14:51     ` Rob Herring
2023-07-07 12:28     ` Gatien CHEVALLIER
2023-07-07 12:28       ` Gatien CHEVALLIER
2023-07-07 12:28       ` Gatien CHEVALLIER
2023-07-07 15:20       ` Rob Herring
2023-07-07 15:20         ` Rob Herring
2023-07-07 15:20         ` Rob Herring
2023-07-10  8:22         ` Gatien CHEVALLIER
2023-07-10  8:22           ` Gatien CHEVALLIER
2023-07-10  8:22           ` Gatien CHEVALLIER
2023-07-10 14:42           ` Rob Herring
2023-07-10 14:42             ` Rob Herring
2023-07-10 14:42             ` Rob Herring
2023-07-07 14:07   ` Oleksii Moisieiev
2023-07-07 14:07     ` Oleksii Moisieiev
2023-07-07 14:07     ` Oleksii Moisieiev
2023-07-07 15:26     ` Gatien CHEVALLIER
2023-07-07 15:26       ` Gatien CHEVALLIER
2023-07-07 15:26       ` Gatien CHEVALLIER
2023-07-07 15:27     ` Rob Herring
2023-07-07 15:27       ` Rob Herring
2023-07-07 15:27       ` Rob Herring
2023-07-07 16:10       ` Oleksii Moisieiev
2023-07-07 16:10         ` Oleksii Moisieiev
2023-07-07 16:10         ` Oleksii Moisieiev
2023-07-07 20:33         ` Rob Herring
2023-07-07 20:33           ` Rob Herring
2023-07-07 20:33           ` Rob Herring
2023-07-10  6:27           ` Oleksii Moisieiev
2023-07-10  6:27             ` Oleksii Moisieiev
2023-07-10  6:27             ` Oleksii Moisieiev
2023-07-05 17:27 ` [PATCH 05/10] firewall: introduce stm32_firewall framework Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-06 15:09   ` Rob Herring
2023-07-06 15:09     ` Rob Herring
2023-07-06 15:09     ` Rob Herring
2023-07-07 13:43     ` Gatien CHEVALLIER
2023-07-07 13:43       ` Gatien CHEVALLIER
2023-07-07 13:43       ` Gatien CHEVALLIER
2023-07-07 15:07       ` Rob Herring
2023-07-07 15:07         ` Rob Herring
2023-07-07 15:07         ` Rob Herring
2023-07-13 13:58         ` Gatien CHEVALLIER
2023-07-13 13:58           ` Gatien CHEVALLIER
2023-07-13 13:58           ` Gatien CHEVALLIER
2023-07-13 14:13           ` Oleksii Moisieiev
2023-07-13 14:13             ` Oleksii Moisieiev
2023-07-13 14:13             ` Oleksii Moisieiev
2023-07-07 10:37   ` Greg KH
2023-07-07 10:37     ` Greg KH
2023-07-07 10:37     ` Greg KH
2023-07-07 14:00     ` Gatien CHEVALLIER
2023-07-07 14:00       ` Gatien CHEVALLIER
2023-07-07 14:00       ` Gatien CHEVALLIER
2023-07-07 15:10       ` Greg KH
2023-07-07 15:10         ` Greg KH
2023-07-07 15:10         ` Greg KH
2023-07-07 15:44         ` Gatien CHEVALLIER
2023-07-07 15:44           ` Gatien CHEVALLIER
2023-07-07 15:44           ` Gatien CHEVALLIER
2023-07-07 13:50   ` Oleksii Moisieiev
2023-07-07 13:50     ` Oleksii Moisieiev
2023-07-07 13:50     ` Oleksii Moisieiev
2023-07-07 15:01     ` Gatien CHEVALLIER
2023-07-07 15:01       ` Gatien CHEVALLIER
2023-07-07 15:01       ` Gatien CHEVALLIER
2023-07-07 16:01       ` Oleksii Moisieiev
2023-07-07 16:01         ` Oleksii Moisieiev
2023-07-07 16:01         ` Oleksii Moisieiev
2023-07-05 17:27 ` [PATCH 06/10] bus: rifsc: introduce RIFSC firewall controller driver Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27 ` [PATCH 07/10] arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-06  9:25   ` Alexandre TORGUE
2023-07-06  9:25     ` Alexandre TORGUE
2023-07-06  9:25     ` Alexandre TORGUE
2023-07-06  9:30     ` Gatien CHEVALLIER
2023-07-06  9:30       ` Gatien CHEVALLIER
2023-07-06  9:30       ` Gatien CHEVALLIER
2023-07-25 14:07       ` Gatien CHEVALLIER
2023-07-25 14:07         ` Gatien CHEVALLIER
2023-07-05 17:27 ` [PATCH 08/10] bus: etzpc: introduce ETZPC firewall controller driver Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27 ` [PATCH 09/10] ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27 ` [PATCH 10/10] ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier
2023-07-05 17:27   ` Gatien Chevallier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230705172759.1610753-1-gatien.chevallier@foss.st.com \
    --to=gatien.chevallier@foss.st.com \
    --cc=Oleksii_Moisieiev@epam.com \
    --cc=alexandre.torgue@foss.st.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=andi.shyti@kernel.org \
    --cc=arnaud.pouliquen@foss.st.com \
    --cc=arnd@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=conor+dt@kernel.org \
    --cc=davem@davemloft.net \
    --cc=devicetree@vger.kernel.org \
    --cc=dmaengine@vger.kernel.org \
    --cc=edumazet@google.com \
    --cc=fabrice.gasnier@foss.st.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=herbert@gondor.apana.org.au \
    --cc=hugues.fruchet@foss.st.com \
    --cc=jic23@kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=kuba@kernel.org \
    --cc=lee@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-i2c@vger.kernel.org \
    --cc=linux-iio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-media@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=linux-serial@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=linux-stm32@st-md-mailman.stormreply.com \
    --cc=linux-usb@vger.kernel.org \
    --cc=mchehab@kernel.org \
    --cc=netdev@vger.kernel.org \
    --cc=olivier.moysan@foss.st.com \
    --cc=pabeni@redhat.com \
    --cc=richardcochran@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=ulf.hansson@linaro.org \
    --cc=vkoul@kernel.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.