From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Subject: [PATCH 6.1.y-cip 2/6] arm64: defconfig: Enable Renesas MTU3a counter config
Date: Tue, 18 Jul 2023 15:11:25 +0100 [thread overview]
Message-ID: <20230718141129.119809-3-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20230718141129.119809-1-biju.das.jz@bp.renesas.com>
commit cacde5cc9dbc1af46a5d35efd17365bc3324b4fb upstream.
Enable MFD & counter related configs for Renesas MTU3a Counter as
it is populated on RZ/{G2L, LC, UL} and RZ/V2L SMARC EVKs.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230417100607.309068-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/configs/defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 9110a0f1b272..3164657aa297 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -653,6 +653,7 @@ CONFIG_MFD_SPMI_PMIC=y
CONFIG_MFD_RK808=y
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_SL28CPLD=y
+CONFIG_RZ_MTU3=y
CONFIG_MFD_ROHM_BD718XX=y
CONFIG_MFD_WCD934X=m
CONFIG_REGULATOR_FIXED_VOLTAGE=y
@@ -1309,6 +1310,8 @@ CONFIG_INTERCONNECT_QCOM_SM8150=m
CONFIG_INTERCONNECT_QCOM_SM8250=m
CONFIG_INTERCONNECT_QCOM_SM8350=m
CONFIG_INTERCONNECT_QCOM_SM8450=m
+CONFIG_COUNTER=m
+CONFIG_RZ_MTU3_CNT=m
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
--
2.25.1
next prev parent reply other threads:[~2023-07-18 14:11 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-18 14:11 [PATCH 6.1.y-cip 0/6] Add RZ/{G2L,G2LC,V2L} MTU3 PWM support Biju Das
2023-07-18 14:11 ` [PATCH 6.1.y-cip 1/6] arm64: dts: renesas: rzg2lc-smarc: Include SoM DTSI into board DTS Biju Das
2023-07-18 14:11 ` Biju Das [this message]
2023-07-18 14:11 ` [PATCH 6.1.y-cip 3/6] pwm: Add Renesas RZ/G2L MTU3a PWM driver Biju Das
2023-07-18 14:11 ` [PATCH 6.1.y-cip 4/6] arm64: dts: renesas: rzg2l-smarc: Add support for enabling MTU3 Biju Das
2023-07-18 14:11 ` [PATCH 6.1.y-cip 5/6] arm64: dts: renesas: rzg2lc-smarc: " Biju Das
2023-07-18 14:11 ` [PATCH 6.1.y-cip 6/6] arm64: defconfig: Enable Renesas MTU3a PWM config Biju Das
2023-07-19 14:11 ` [PATCH 6.1.y-cip 0/6] Add RZ/{G2L,G2LC,V2L} MTU3 PWM support Pavel Machek
2023-07-20 9:59 ` nobuhiro1.iwamatsu
2023-07-20 11:05 ` Biju Das
2023-07-20 11:33 ` Pavel Machek
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230718141129.119809-3-biju.das.jz@bp.renesas.com \
--to=biju.das.jz@bp.renesas.com \
--cc=cip-dev@lists.cip-project.org \
--cc=fabrizio.castro.jz@renesas.com \
--cc=nobuhiro1.iwamatsu@toshiba.co.jp \
--cc=pavel@denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.