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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Aditya Swarup <aditya.swarup@intel.com>,
	Matt Roper <matthew.d.roper@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: [PATCH] drm/i915: Tidy for_each_set_bit usage with abox_regs
Date: Mon, 24 Jul 2023 12:56:24 +0100	[thread overview]
Message-ID: <20230724115624.1485010-1-tvrtko.ursulin@linux.intel.com> (raw)

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

For_each_set_bit wants the max number of bits to walk and not the byte
storage size of the source field.

In this case there is no bug since abox_mask can mostly contain bits 0-2.

Another funny thing is that both sizeof(abox_mask), where abox_mask is
unsigned long, and BITS_PER_TYPE(DISPLAY_INFO->abox_mask)), are 8 (on
64-bit builds) so there is even less between them.

Anyway, why not make it explicit to what the constraint is.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
References: 62afef2811e4 ("drm/i915/rkl: RKL uses ABOX0 for pixel transfers")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 38225e5d311e..27a484892908 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1170,7 +1170,8 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv)
 	if (DISPLAY_VER(dev_priv) == 12)
 		abox_regs |= BIT(0);
 
-	for_each_set_bit(i, &abox_regs, sizeof(abox_regs))
+	for_each_set_bit(i, &abox_regs,
+			 BITS_PER_TYPE(DISPLAY_INFO(dev_priv)->abox_mask))
 		intel_de_rmw(dev_priv, MBUS_ABOX_CTL(i), mask, val);
 }
 
@@ -1623,11 +1624,13 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
 	if (table[config].page_mask == 0) {
 		drm_dbg(&dev_priv->drm,
 			"Unknown memory configuration; disabling address buddy logic.\n");
-		for_each_set_bit(i, &abox_mask, sizeof(abox_mask))
+		for_each_set_bit(i, &abox_mask,
+				 BITS_PER_TYPE(DISPLAY_INFO(dev_priv)->abox_mask))
 			intel_de_write(dev_priv, BW_BUDDY_CTL(i),
 				       BW_BUDDY_DISABLE);
 	} else {
-		for_each_set_bit(i, &abox_mask, sizeof(abox_mask)) {
+		for_each_set_bit(i, &abox_mask,
+				 BITS_PER_TYPE(DISPLAY_INFO(dev_priv)->abox_mask)) {
 			intel_de_write(dev_priv, BW_BUDDY_PAGE_MASK(i),
 				       table[config].page_mask);
 
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915: Tidy for_each_set_bit usage with abox_regs
Date: Mon, 24 Jul 2023 12:56:24 +0100	[thread overview]
Message-ID: <20230724115624.1485010-1-tvrtko.ursulin@linux.intel.com> (raw)

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

For_each_set_bit wants the max number of bits to walk and not the byte
storage size of the source field.

In this case there is no bug since abox_mask can mostly contain bits 0-2.

Another funny thing is that both sizeof(abox_mask), where abox_mask is
unsigned long, and BITS_PER_TYPE(DISPLAY_INFO->abox_mask)), are 8 (on
64-bit builds) so there is even less between them.

Anyway, why not make it explicit to what the constraint is.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
References: 62afef2811e4 ("drm/i915/rkl: RKL uses ABOX0 for pixel transfers")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 38225e5d311e..27a484892908 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1170,7 +1170,8 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv)
 	if (DISPLAY_VER(dev_priv) == 12)
 		abox_regs |= BIT(0);
 
-	for_each_set_bit(i, &abox_regs, sizeof(abox_regs))
+	for_each_set_bit(i, &abox_regs,
+			 BITS_PER_TYPE(DISPLAY_INFO(dev_priv)->abox_mask))
 		intel_de_rmw(dev_priv, MBUS_ABOX_CTL(i), mask, val);
 }
 
@@ -1623,11 +1624,13 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
 	if (table[config].page_mask == 0) {
 		drm_dbg(&dev_priv->drm,
 			"Unknown memory configuration; disabling address buddy logic.\n");
-		for_each_set_bit(i, &abox_mask, sizeof(abox_mask))
+		for_each_set_bit(i, &abox_mask,
+				 BITS_PER_TYPE(DISPLAY_INFO(dev_priv)->abox_mask))
 			intel_de_write(dev_priv, BW_BUDDY_CTL(i),
 				       BW_BUDDY_DISABLE);
 	} else {
-		for_each_set_bit(i, &abox_mask, sizeof(abox_mask)) {
+		for_each_set_bit(i, &abox_mask,
+				 BITS_PER_TYPE(DISPLAY_INFO(dev_priv)->abox_mask)) {
 			intel_de_write(dev_priv, BW_BUDDY_PAGE_MASK(i),
 				       table[config].page_mask);
 
-- 
2.39.2


             reply	other threads:[~2023-07-24 11:56 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-24 11:56 Tvrtko Ursulin [this message]
2023-07-24 11:56 ` [Intel-gfx] [PATCH] drm/i915: Tidy for_each_set_bit usage with abox_regs Tvrtko Ursulin
2023-07-24 14:12 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2023-07-24 19:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Tidy for_each_set_bit usage with abox_regs (rev2) Patchwork
2023-07-25  4:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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