From: Michael Walle <mwalle@kernel.org>
To: Tudor Ambarus <tudor.ambarus@linaro.org>,
Pratyush Yadav <pratyush@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
Michael Walle <mwalle@kernel.org>
Subject: [PATCH v3 39/41] mtd: spi-nor: winbond: sort flash_info entries
Date: Fri, 08 Sep 2023 12:16:57 +0200 [thread overview]
Message-ID: <20230807-mtd-flash-info-db-rework-v3-39-e60548861b10@kernel.org> (raw)
In-Reply-To: <20230807-mtd-flash-info-db-rework-v3-0-e60548861b10@kernel.org>
The flash ID is the new primary key into our database. Sort the entry by
it. Keep the most specific ones first, because there might be ID
collisions between shorter and longer ones.
Signed-off-by: Michael Walle <mwalle@kernel.org>
---
drivers/mtd/spi-nor/winbond.c | 166 +++++++++++++++++++++---------------------
1 file changed, 83 insertions(+), 83 deletions(-)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index edc64c99cd81..142fb27b2ea9 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -72,37 +72,25 @@ static const struct flash_info winbond_nor_parts[] = {
.name = "w25x16",
.size = SZ_2M,
.no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x15),
- .name = "w25q16dw",
- .size = SZ_2M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x30, 0x16),
.name = "w25x32",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
- .id = SNOR_ID(0xef, 0x70, 0x15),
- .name = "w25q16jv-im/jm",
- .size = SZ_2M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .id = SNOR_ID(0xef, 0x30, 0x17),
+ .name = "w25x64",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0xef, 0x40, 0x12),
.name = "w25q20cl",
.size = SZ_256K,
.no_sfdp_flags = SECT_4K,
}, {
- .id = SNOR_ID(0xef, 0x50, 0x12),
- .name = "w25q20bw",
- .size = SZ_256K,
- .no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x12),
- .name = "w25q20ew",
- .size = SZ_256K,
+ .id = SNOR_ID(0xef, 0x40, 0x14),
+ .name = "w25q80bl",
+ .size = SZ_1M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0xef, 0x40, 0x16),
@@ -110,57 +98,84 @@ static const struct flash_info winbond_nor_parts[] = {
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
- .id = SNOR_ID(0xef, 0x60, 0x16),
- .name = "w25q32dw",
- .size = SZ_4M,
+ .id = SNOR_ID(0xef, 0x40, 0x17),
+ .name = "w25q64",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x18),
+ .name = "w25q128",
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x19),
+ .name = "w25q256",
+ .size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ .fixups = &w25q256_fixups,
}, {
- .id = SNOR_ID(0xef, 0x70, 0x16),
- .name = "w25q32jv",
- .size = SZ_4M,
+ .id = SNOR_ID(0xef, 0x40, 0x20),
+ .name = "w25q512jvq",
+ .size = SZ_64M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x50, 0x12),
+ .name = "w25q20bw",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x50, 0x14),
+ .name = "w25q80",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x12),
+ .name = "w25q20ew",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x15),
+ .name = "w25q16dw",
+ .size = SZ_2M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x80, 0x16),
- .name = "w25q32jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x16),
+ .name = "w25q32dw",
.size = SZ_4M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
}, {
- .id = SNOR_ID(0xef, 0x80, 0x17),
- .name = "w25q64jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x17),
+ .name = "w25q64dw",
.size = SZ_8M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x80, 0x18),
- .name = "w25q128jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x18),
+ .name = "w25q128fw",
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x80, 0x19),
- .name = "w25q256jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x19),
+ .name = "w25q256jw",
.size = SZ_32M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x30, 0x17),
- .name = "w25x64",
- .size = SZ_8M,
- .no_sfdp_flags = SECT_4K,
+ .id = SNOR_ID(0xef, 0x60, 0x20),
+ .name = "w25q512nwq",
+ .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
}, {
- .id = SNOR_ID(0xef, 0x40, 0x17),
- .name = "w25q64",
- .size = SZ_8M,
+ .id = SNOR_ID(0xef, 0x70, 0x15),
+ .name = "w25q16jv-im/jm",
+ .size = SZ_2M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x60, 0x17),
- .name = "w25q64dw",
- .size = SZ_8M,
+ .id = SNOR_ID(0xef, 0x70, 0x16),
+ .name = "w25q32jv",
+ .size = SZ_4M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
@@ -168,64 +183,49 @@ static const struct flash_info winbond_nor_parts[] = {
.name = "w25q64jvm",
.size = SZ_8M,
.no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x18),
- .name = "w25q128fw",
- .size = SZ_16M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x70, 0x18),
.name = "w25q128jv",
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- }, {
- .id = SNOR_ID(0xef, 0x50, 0x14),
- .name = "w25q80",
- .size = SZ_1M,
- .no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x14),
- .name = "w25q80bl",
- .size = SZ_1M,
- .no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x18),
- .name = "w25q128",
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x19),
- .name = "w25q256",
- .size = SZ_32M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .fixups = &w25q256_fixups,
}, {
.id = SNOR_ID(0xef, 0x70, 0x19),
.name = "w25q256jvm",
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x19),
- .name = "w25q256jw",
- .size = SZ_32M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x71, 0x19),
.name = "w25m512jv",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x60, 0x20),
- .name = "w25q512nwq",
+ .id = SNOR_ID(0xef, 0x80, 0x16),
+ .name = "w25q32jwm",
+ .size = SZ_4M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x17),
+ .name = "w25q64jwm",
+ .size = SZ_8M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x18),
+ .name = "w25q128jwm",
+ .size = SZ_16M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x19),
+ .name = "w25q256jwm",
+ .size = SZ_32M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x80, 0x20),
.name = "w25q512nwm",
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x20),
- .name = "w25q512jvq",
- .size = SZ_64M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
},
};
--
2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Michael Walle <mwalle@kernel.org>
To: Tudor Ambarus <tudor.ambarus@linaro.org>,
Pratyush Yadav <pratyush@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
Michael Walle <mwalle@kernel.org>
Subject: [PATCH v3 39/41] mtd: spi-nor: winbond: sort flash_info entries
Date: Fri, 08 Sep 2023 12:16:57 +0200 [thread overview]
Message-ID: <20230807-mtd-flash-info-db-rework-v3-39-e60548861b10@kernel.org> (raw)
In-Reply-To: <20230807-mtd-flash-info-db-rework-v3-0-e60548861b10@kernel.org>
The flash ID is the new primary key into our database. Sort the entry by
it. Keep the most specific ones first, because there might be ID
collisions between shorter and longer ones.
Signed-off-by: Michael Walle <mwalle@kernel.org>
---
drivers/mtd/spi-nor/winbond.c | 166 +++++++++++++++++++++---------------------
1 file changed, 83 insertions(+), 83 deletions(-)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index edc64c99cd81..142fb27b2ea9 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -72,37 +72,25 @@ static const struct flash_info winbond_nor_parts[] = {
.name = "w25x16",
.size = SZ_2M,
.no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x15),
- .name = "w25q16dw",
- .size = SZ_2M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x30, 0x16),
.name = "w25x32",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
- .id = SNOR_ID(0xef, 0x70, 0x15),
- .name = "w25q16jv-im/jm",
- .size = SZ_2M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .id = SNOR_ID(0xef, 0x30, 0x17),
+ .name = "w25x64",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0xef, 0x40, 0x12),
.name = "w25q20cl",
.size = SZ_256K,
.no_sfdp_flags = SECT_4K,
}, {
- .id = SNOR_ID(0xef, 0x50, 0x12),
- .name = "w25q20bw",
- .size = SZ_256K,
- .no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x12),
- .name = "w25q20ew",
- .size = SZ_256K,
+ .id = SNOR_ID(0xef, 0x40, 0x14),
+ .name = "w25q80bl",
+ .size = SZ_1M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0xef, 0x40, 0x16),
@@ -110,57 +98,84 @@ static const struct flash_info winbond_nor_parts[] = {
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
- .id = SNOR_ID(0xef, 0x60, 0x16),
- .name = "w25q32dw",
- .size = SZ_4M,
+ .id = SNOR_ID(0xef, 0x40, 0x17),
+ .name = "w25q64",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x18),
+ .name = "w25q128",
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x19),
+ .name = "w25q256",
+ .size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ .fixups = &w25q256_fixups,
}, {
- .id = SNOR_ID(0xef, 0x70, 0x16),
- .name = "w25q32jv",
- .size = SZ_4M,
+ .id = SNOR_ID(0xef, 0x40, 0x20),
+ .name = "w25q512jvq",
+ .size = SZ_64M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x50, 0x12),
+ .name = "w25q20bw",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x50, 0x14),
+ .name = "w25q80",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x12),
+ .name = "w25q20ew",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x15),
+ .name = "w25q16dw",
+ .size = SZ_2M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x80, 0x16),
- .name = "w25q32jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x16),
+ .name = "w25q32dw",
.size = SZ_4M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
}, {
- .id = SNOR_ID(0xef, 0x80, 0x17),
- .name = "w25q64jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x17),
+ .name = "w25q64dw",
.size = SZ_8M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x80, 0x18),
- .name = "w25q128jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x18),
+ .name = "w25q128fw",
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x80, 0x19),
- .name = "w25q256jwm",
+ .id = SNOR_ID(0xef, 0x60, 0x19),
+ .name = "w25q256jw",
.size = SZ_32M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x30, 0x17),
- .name = "w25x64",
- .size = SZ_8M,
- .no_sfdp_flags = SECT_4K,
+ .id = SNOR_ID(0xef, 0x60, 0x20),
+ .name = "w25q512nwq",
+ .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
}, {
- .id = SNOR_ID(0xef, 0x40, 0x17),
- .name = "w25q64",
- .size = SZ_8M,
+ .id = SNOR_ID(0xef, 0x70, 0x15),
+ .name = "w25q16jv-im/jm",
+ .size = SZ_2M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x60, 0x17),
- .name = "w25q64dw",
- .size = SZ_8M,
+ .id = SNOR_ID(0xef, 0x70, 0x16),
+ .name = "w25q32jv",
+ .size = SZ_4M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
@@ -168,64 +183,49 @@ static const struct flash_info winbond_nor_parts[] = {
.name = "w25q64jvm",
.size = SZ_8M,
.no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x18),
- .name = "w25q128fw",
- .size = SZ_16M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x70, 0x18),
.name = "w25q128jv",
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- }, {
- .id = SNOR_ID(0xef, 0x50, 0x14),
- .name = "w25q80",
- .size = SZ_1M,
- .no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x14),
- .name = "w25q80bl",
- .size = SZ_1M,
- .no_sfdp_flags = SECT_4K,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x18),
- .name = "w25q128",
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x19),
- .name = "w25q256",
- .size = SZ_32M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .fixups = &w25q256_fixups,
}, {
.id = SNOR_ID(0xef, 0x70, 0x19),
.name = "w25q256jvm",
- }, {
- .id = SNOR_ID(0xef, 0x60, 0x19),
- .name = "w25q256jw",
- .size = SZ_32M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x71, 0x19),
.name = "w25m512jv",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
- .id = SNOR_ID(0xef, 0x60, 0x20),
- .name = "w25q512nwq",
+ .id = SNOR_ID(0xef, 0x80, 0x16),
+ .name = "w25q32jwm",
+ .size = SZ_4M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x17),
+ .name = "w25q64jwm",
+ .size = SZ_8M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x18),
+ .name = "w25q128jwm",
+ .size = SZ_16M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x19),
+ .name = "w25q256jwm",
+ .size = SZ_32M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xef, 0x80, 0x20),
.name = "w25q512nwm",
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
- }, {
- .id = SNOR_ID(0xef, 0x40, 0x20),
- .name = "w25q512jvq",
- .size = SZ_64M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
},
};
--
2.39.2
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next prev parent reply other threads:[~2023-09-08 10:20 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-08 10:16 [PATCH v3 00/41] mtd: spi-nor: clean the flash_info database up Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 01/41] mtd: spi-nor: remove catalyst 'flashes' Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 02/41] mtd: spi-nor: remove Fujitsu MB85RS1MT support Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 03/41] mtd: spi-nor: xilinx: use SPI_NOR_ID() in S3AN_INFO() Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-18 5:22 ` Tudor Ambarus
2023-09-18 5:22 ` Tudor Ambarus
2023-09-08 10:16 ` [PATCH v3 04/41] mtd: spi-nor: xilinx: remove addr_nbytes from S3AN_INFO() Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 05/41] mtd: spi-nor: convert .n_sectors to .size Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-19 9:24 ` Tudor Ambarus
2023-09-19 9:24 ` Tudor Ambarus
2023-09-19 11:18 ` Michael Walle
2023-09-19 11:18 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 06/41] mtd: spi-nor: default page_size to 256 bytes Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 07/41] mtd: spi-nor: store .n_banks in struct spi_nor_flash_parameter Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 08/41] mtd: spi-nor: default .n_banks to 1 Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 09/41] mtd: spi-nor: push 4k SE handling into spi_nor_select_uniform_erase() Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 10/41] mtd: spi-nor: make sector_size optional Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-19 9:25 ` Tudor Ambarus
2023-09-19 9:25 ` Tudor Ambarus
2023-09-19 11:31 ` Michael Walle
2023-09-19 11:31 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 11/41] mtd: spi-nor: drop .parse_sfdp Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 12/41] mtd: spi-nor: introduce (temporary) INFO0() Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 13/41] mtd: spi-nor: move the .id and .id_len into an own structure Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 14/41] mtd: spi-nor: rename .otp_org to .otp and make it a pointer Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 15/41] mtd: spi-nor: add SNOR_ID() and SNOR_OTP() Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 16/41] mtd: spi-nor: remove or move flash_info comments Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 17/41] mtd: spi-nor: atmel: convert flash_info to new format Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 18/41] mtd: spi-nor: eon: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 19/41] mtd: spi-nor: esmt: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 20/41] mtd: spi-nor: everspin: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-19 9:24 ` Tudor Ambarus
2023-09-19 9:24 ` Tudor Ambarus
2023-09-19 11:33 ` Michael Walle
2023-09-19 11:33 ` Michael Walle
2023-09-19 15:57 ` Tudor Ambarus
2023-09-19 15:57 ` Tudor Ambarus
2023-09-08 10:16 ` [PATCH v3 21/41] mtd: spi-nor: gigadevice: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 22/41] mtd: spi-nor: intel: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 23/41] mtd: spi-nor: issi: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 24/41] mtd: spi-nor: macronix: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 25/41] mtd: spi-nor: micron-st: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 26/41] mtd: spi-nor: spansion: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 27/41] mtd: spi-nor: sst: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 28/41] mtd: spi-nor: winbond: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 29/41] mtd: spi-nor: xilinx: use new macros in S3AN_INFO() Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 30/41] mtd: spi-nor: xmc: convert flash_info to new format Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 31/41] mtd: spi-nor: atmel: sort flash_info database Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 32/41] mtd: spi-nor: eon: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 33/41] mtd: spi-nor: gigadevice: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 34/41] mtd: spi-nor: issi: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 35/41] mtd: spi-nor: macronix: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 36/41] mtd: spi-nor: micron-st: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 37/41] mtd: spi-nor: spansion: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 38/41] mtd: spi-nor: sst: " Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` Michael Walle [this message]
2023-09-08 10:16 ` [PATCH v3 39/41] mtd: spi-nor: winbond: sort flash_info entries Michael Walle
2023-09-08 10:16 ` [PATCH v3 40/41] mtd: spi-nor: atmel: drop duplicate entry Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 41/41] mtd: spi-nor: core: get rid of the INFOx() macros Michael Walle
2023-09-08 10:16 ` Michael Walle
2023-09-19 9:39 ` [PATCH v3 00/41] mtd: spi-nor: clean the flash_info database up Tudor Ambarus
2023-09-19 9:39 ` Tudor Ambarus
2023-09-19 11:35 ` Michael Walle
2023-09-19 11:35 ` Michael Walle
2023-09-19 16:02 ` Tudor Ambarus
2023-09-19 16:02 ` Tudor Ambarus
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