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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Borislav Petkov <bp@alien8.de>,
	Ashok Raj <ashok.raj@intel.com>,
	Arjan van de Ven <arjan@linux.intel.com>,
	Nikolay Borisov <nik.borisov@suse.com>
Subject: [patch V2 03/37] x86/microcode/intel: Move microcode functions out of cpu/intel.c
Date: Sat, 12 Aug 2023 21:58:41 +0200 (CEST)	[thread overview]
Message-ID: <20230812195727.719202319@linutronix.de> (raw)
In-Reply-To: 20230812194003.682298127@linutronix.de

There is really no point to have that in the CPUID evaluation code. Move it
into the intel specific microcode handling along with the datastructures,
defines and helpers required by it. The exports need to stay for IFS.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: Move the structs, defines and helpers into intel.c
---
 arch/x86/include/asm/microcode_intel.h |   28 ----
 arch/x86/kernel/cpu/intel.c            |  174 ----------------------------
 arch/x86/kernel/cpu/microcode/intel.c  |  202 +++++++++++++++++++++++++++++++++
 3 files changed, 204 insertions(+), 200 deletions(-)

--- a/arch/x86/include/asm/microcode_intel.h
+++ b/arch/x86/include/asm/microcode_intel.h
@@ -23,39 +23,15 @@ struct microcode_intel {
 	unsigned int            bits[];
 };
 
-/* microcode format is extended from prescott processors */
-struct extended_signature {
-	unsigned int            sig;
-	unsigned int            pf;
-	unsigned int            cksum;
-};
-
-struct extended_sigtable {
-	unsigned int            count;
-	unsigned int            cksum;
-	unsigned int            reserved[3];
-	struct extended_signature sigs[];
-};
-
-#define DEFAULT_UCODE_DATASIZE	(2000)
-#define MC_HEADER_SIZE		(sizeof(struct microcode_header_intel))
-#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
-#define EXT_HEADER_SIZE		(sizeof(struct extended_sigtable))
-#define EXT_SIGNATURE_SIZE	(sizeof(struct extended_signature))
+#define MC_HEADER_SIZE			(sizeof(struct microcode_header_intel))
 #define MC_HEADER_TYPE_MICROCODE	1
 #define MC_HEADER_TYPE_IFS		2
-
-#define get_totalsize(mc) \
-	(((struct microcode_intel *)mc)->hdr.datasize ? \
-	 ((struct microcode_intel *)mc)->hdr.totalsize : \
-	 DEFAULT_UCODE_TOTALSIZE)
+#define DEFAULT_UCODE_DATASIZE		(2000)
 
 #define get_datasize(mc) \
 	(((struct microcode_intel *)mc)->hdr.datasize ? \
 	 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
 
-#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
-
 static inline u32 intel_get_microcode_revision(void)
 {
 	u32 rev, dummy;
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -184,180 +184,6 @@ static bool bad_spectre_microcode(struct
 	return false;
 }
 
-int intel_cpu_collect_info(struct ucode_cpu_info *uci)
-{
-	unsigned int val[2];
-	unsigned int family, model;
-	struct cpu_signature csig = { 0 };
-	unsigned int eax, ebx, ecx, edx;
-
-	memset(uci, 0, sizeof(*uci));
-
-	eax = 0x00000001;
-	ecx = 0;
-	native_cpuid(&eax, &ebx, &ecx, &edx);
-	csig.sig = eax;
-
-	family = x86_family(eax);
-	model  = x86_model(eax);
-
-	if (model >= 5 || family > 6) {
-		/* get processor flags from MSR 0x17 */
-		native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
-		csig.pf = 1 << ((val[1] >> 18) & 7);
-	}
-
-	csig.rev = intel_get_microcode_revision();
-
-	uci->cpu_sig = csig;
-
-	return 0;
-}
-EXPORT_SYMBOL_GPL(intel_cpu_collect_info);
-
-/*
- * Returns 1 if update has been found, 0 otherwise.
- */
-int intel_find_matching_signature(void *mc, unsigned int csig, int cpf)
-{
-	struct microcode_header_intel *mc_hdr = mc;
-	struct extended_sigtable *ext_hdr;
-	struct extended_signature *ext_sig;
-	int i;
-
-	if (intel_cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
-		return 1;
-
-	/* Look for ext. headers: */
-	if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
-		return 0;
-
-	ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
-	ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
-
-	for (i = 0; i < ext_hdr->count; i++) {
-		if (intel_cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
-			return 1;
-		ext_sig++;
-	}
-	return 0;
-}
-EXPORT_SYMBOL_GPL(intel_find_matching_signature);
-
-/**
- * intel_microcode_sanity_check() - Sanity check microcode file.
- * @mc: Pointer to the microcode file contents.
- * @print_err: Display failure reason if true, silent if false.
- * @hdr_type: Type of file, i.e. normal microcode file or In Field Scan file.
- *            Validate if the microcode header type matches with the type
- *            specified here.
- *
- * Validate certain header fields and verify if computed checksum matches
- * with the one specified in the header.
- *
- * Return: 0 if the file passes all the checks, -EINVAL if any of the checks
- * fail.
- */
-int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type)
-{
-	unsigned long total_size, data_size, ext_table_size;
-	struct microcode_header_intel *mc_header = mc;
-	struct extended_sigtable *ext_header = NULL;
-	u32 sum, orig_sum, ext_sigcount = 0, i;
-	struct extended_signature *ext_sig;
-
-	total_size = get_totalsize(mc_header);
-	data_size = get_datasize(mc_header);
-
-	if (data_size + MC_HEADER_SIZE > total_size) {
-		if (print_err)
-			pr_err("Error: bad microcode data file size.\n");
-		return -EINVAL;
-	}
-
-	if (mc_header->ldrver != 1 || mc_header->hdrver != hdr_type) {
-		if (print_err)
-			pr_err("Error: invalid/unknown microcode update format. Header type %d\n",
-			       mc_header->hdrver);
-		return -EINVAL;
-	}
-
-	ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
-	if (ext_table_size) {
-		u32 ext_table_sum = 0;
-		u32 *ext_tablep;
-
-		if (ext_table_size < EXT_HEADER_SIZE ||
-		    ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
-			if (print_err)
-				pr_err("Error: truncated extended signature table.\n");
-			return -EINVAL;
-		}
-
-		ext_header = mc + MC_HEADER_SIZE + data_size;
-		if (ext_table_size != exttable_size(ext_header)) {
-			if (print_err)
-				pr_err("Error: extended signature table size mismatch.\n");
-			return -EFAULT;
-		}
-
-		ext_sigcount = ext_header->count;
-
-		/*
-		 * Check extended table checksum: the sum of all dwords that
-		 * comprise a valid table must be 0.
-		 */
-		ext_tablep = (u32 *)ext_header;
-
-		i = ext_table_size / sizeof(u32);
-		while (i--)
-			ext_table_sum += ext_tablep[i];
-
-		if (ext_table_sum) {
-			if (print_err)
-				pr_warn("Bad extended signature table checksum, aborting.\n");
-			return -EINVAL;
-		}
-	}
-
-	/*
-	 * Calculate the checksum of update data and header. The checksum of
-	 * valid update data and header including the extended signature table
-	 * must be 0.
-	 */
-	orig_sum = 0;
-	i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
-	while (i--)
-		orig_sum += ((u32 *)mc)[i];
-
-	if (orig_sum) {
-		if (print_err)
-			pr_err("Bad microcode data checksum, aborting.\n");
-		return -EINVAL;
-	}
-
-	if (!ext_table_size)
-		return 0;
-
-	/*
-	 * Check extended signature checksum: 0 => valid.
-	 */
-	for (i = 0; i < ext_sigcount; i++) {
-		ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
-			  EXT_SIGNATURE_SIZE * i;
-
-		sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
-		      (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
-		if (sum) {
-			if (print_err)
-				pr_err("Bad extended signature checksum, aborting.\n");
-			return -EINVAL;
-		}
-	}
-	return 0;
-}
-EXPORT_SYMBOL_GPL(intel_microcode_sanity_check);
-
 static void early_init_intel(struct cpuinfo_x86 *c)
 {
 	u64 misc_enable;
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -45,6 +45,208 @@ static struct microcode_intel *intel_uco
 /* last level cache size per core */
 static int llc_size_per_core;
 
+/* microcode format is extended from prescott processors */
+struct extended_signature {
+	unsigned int	sig;
+	unsigned int	pf;
+	unsigned int	cksum;
+};
+
+struct extended_sigtable {
+	unsigned int			count;
+	unsigned int			cksum;
+	unsigned int			reserved[3];
+	struct extended_signature	sigs[];
+};
+
+#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
+#define EXT_HEADER_SIZE		(sizeof(struct extended_sigtable))
+#define EXT_SIGNATURE_SIZE	(sizeof(struct extended_signature))
+
+static inline unsigned int get_totalsize(struct microcode_header_intel *hdr)
+{
+	return hdr->datasize ? : DEFAULT_UCODE_TOTALSIZE;
+}
+
+static inline unsigned int exttable_size(struct extended_sigtable *et)
+{
+	return et->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE;
+}
+
+int intel_cpu_collect_info(struct ucode_cpu_info *uci)
+{
+	unsigned int val[2];
+	unsigned int family, model;
+	struct cpu_signature csig = { 0 };
+	unsigned int eax, ebx, ecx, edx;
+
+	memset(uci, 0, sizeof(*uci));
+
+	eax = 0x00000001;
+	ecx = 0;
+	native_cpuid(&eax, &ebx, &ecx, &edx);
+	csig.sig = eax;
+
+	family = x86_family(eax);
+	model  = x86_model(eax);
+
+	if (model >= 5 || family > 6) {
+		/* get processor flags from MSR 0x17 */
+		native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
+		csig.pf = 1 << ((val[1] >> 18) & 7);
+	}
+
+	csig.rev = intel_get_microcode_revision();
+
+	uci->cpu_sig = csig;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(intel_cpu_collect_info);
+
+/*
+ * Returns 1 if update has been found, 0 otherwise.
+ */
+int intel_find_matching_signature(void *mc, unsigned int csig, int cpf)
+{
+	struct microcode_header_intel *mc_hdr = mc;
+	struct extended_sigtable *ext_hdr;
+	struct extended_signature *ext_sig;
+	int i;
+
+	if (intel_cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
+		return 1;
+
+	/* Look for ext. headers: */
+	if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
+		return 0;
+
+	ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
+	ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
+
+	for (i = 0; i < ext_hdr->count; i++) {
+		if (intel_cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
+			return 1;
+		ext_sig++;
+	}
+	return 0;
+}
+EXPORT_SYMBOL_GPL(intel_find_matching_signature);
+
+/**
+ * intel_microcode_sanity_check() - Sanity check microcode file.
+ * @mc: Pointer to the microcode file contents.
+ * @print_err: Display failure reason if true, silent if false.
+ * @hdr_type: Type of file, i.e. normal microcode file or In Field Scan file.
+ *            Validate if the microcode header type matches with the type
+ *            specified here.
+ *
+ * Validate certain header fields and verify if computed checksum matches
+ * with the one specified in the header.
+ *
+ * Return: 0 if the file passes all the checks, -EINVAL if any of the checks
+ * fail.
+ */
+int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type)
+{
+	unsigned long total_size, data_size, ext_table_size;
+	struct microcode_header_intel *mc_header = mc;
+	struct extended_sigtable *ext_header = NULL;
+	u32 sum, orig_sum, ext_sigcount = 0, i;
+	struct extended_signature *ext_sig;
+
+	total_size = get_totalsize(mc_header);
+	data_size = get_datasize(mc_header);
+
+	if (data_size + MC_HEADER_SIZE > total_size) {
+		if (print_err)
+			pr_err("Error: bad microcode data file size.\n");
+		return -EINVAL;
+	}
+
+	if (mc_header->ldrver != 1 || mc_header->hdrver != hdr_type) {
+		if (print_err)
+			pr_err("Error: invalid/unknown microcode update format. Header type %d\n",
+			       mc_header->hdrver);
+		return -EINVAL;
+	}
+
+	ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
+	if (ext_table_size) {
+		u32 ext_table_sum = 0;
+		u32 *ext_tablep;
+
+		if (ext_table_size < EXT_HEADER_SIZE ||
+		    ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
+			if (print_err)
+				pr_err("Error: truncated extended signature table.\n");
+			return -EINVAL;
+		}
+
+		ext_header = mc + MC_HEADER_SIZE + data_size;
+		if (ext_table_size != exttable_size(ext_header)) {
+			if (print_err)
+				pr_err("Error: extended signature table size mismatch.\n");
+			return -EFAULT;
+		}
+
+		ext_sigcount = ext_header->count;
+
+		/*
+		 * Check extended table checksum: the sum of all dwords that
+		 * comprise a valid table must be 0.
+		 */
+		ext_tablep = (u32 *)ext_header;
+
+		i = ext_table_size / sizeof(u32);
+		while (i--)
+			ext_table_sum += ext_tablep[i];
+
+		if (ext_table_sum) {
+			if (print_err)
+				pr_warn("Bad extended signature table checksum, aborting.\n");
+			return -EINVAL;
+		}
+	}
+
+	/*
+	 * Calculate the checksum of update data and header. The checksum of
+	 * valid update data and header including the extended signature table
+	 * must be 0.
+	 */
+	orig_sum = 0;
+	i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
+	while (i--)
+		orig_sum += ((u32 *)mc)[i];
+
+	if (orig_sum) {
+		if (print_err)
+			pr_err("Bad microcode data checksum, aborting.\n");
+		return -EINVAL;
+	}
+
+	if (!ext_table_size)
+		return 0;
+
+	/*
+	 * Check extended signature checksum: 0 => valid.
+	 */
+	for (i = 0; i < ext_sigcount; i++) {
+		ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
+			  EXT_SIGNATURE_SIZE * i;
+
+		sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
+		      (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
+		if (sum) {
+			if (print_err)
+				pr_err("Bad extended signature checksum, aborting.\n");
+			return -EINVAL;
+		}
+	}
+	return 0;
+}
+EXPORT_SYMBOL_GPL(intel_microcode_sanity_check);
+
 /*
  * Returns 1 if update has been found, 0 otherwise.
  */


  parent reply	other threads:[~2023-08-12 20:00 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-12 19:58 [patch V2 00/37] x86/microcode: Cleanup and late loading enhancements Thomas Gleixner
2023-08-12 19:58 ` [patch V2 01/37] x86/mm: Remove unused microcode.h include Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-08-12 19:58 ` [patch V2 02/37] x86/microcode: Hide the config knob Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-08-14 21:01   ` [patch V2 02/37] " Josh Triplett
2023-08-14 21:19     ` Borislav Petkov
2023-08-14 23:57       ` Josh Triplett
2023-08-15  8:25         ` Borislav Petkov
2023-08-12 19:58 ` Thomas Gleixner [this message]
2023-08-13 17:26   ` [tip: x86/microcode] x86/microcode/intel: Move microcode functions out of cpu/intel.c tip-bot2 for Thomas Gleixner
2023-08-23 12:51   ` [patch V2 03/37] " Qiuxu Zhuo
2023-08-23 17:46     ` Thomas Gleixner
2023-08-12 19:58 ` [patch V2 04/37] x86/microcode: Include vendor headers into microcode.h Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Ashok Raj
2023-08-12 19:58 ` [patch V2 05/37] x86/microcode: Make reload_early_microcode() static Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-08-12 19:58 ` [patch V2 06/37] x86/microcode/intel: Rename get_datasize() since its used externally Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Ashok Raj
2023-08-12 19:58 ` [patch V2 07/37] x86/microcode: Move core specific defines to local header Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-08-12 19:58 ` [patch V2 08/37] x86/microcode/intel: Remove debug code Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-08-12 19:58 ` [patch V2 09/37] x86/microcode/intel: Remove pointless mutex Thomas Gleixner
2023-08-13  6:55   ` Nikolay Borisov
2023-08-13  9:08     ` Thomas Gleixner
2023-08-13 17:26   ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-08-12 19:58 ` [patch V2 10/37] x86/microcode/intel: Rip out mixed stepping support for Intel CPUs Thomas Gleixner
2023-08-12 19:58 ` [patch V2 11/37] x86/microcode/intel: Simplify scan_microcode() Thomas Gleixner
2023-08-12 19:58 ` [patch V2 12/37] x86/microcode/intel: Simplify and rename generic_load_microcode() Thomas Gleixner
2023-08-14 13:19   ` Borislav Petkov
2023-08-14 14:40     ` Thomas Gleixner
2023-08-12 19:58 ` [patch V2 13/37] x86/microcode/intel: Cleanup code further Thomas Gleixner
2023-08-12 19:58 ` [patch V2 14/37] x86/microcode/intel: Simplify early loading Thomas Gleixner
2023-08-12 19:58 ` [patch V2 15/37] x86/microcode/intel: Save the microcode only after a successful late-load Thomas Gleixner
2023-08-12 19:59 ` [patch V2 16/37] x86/microcode/intel: Switch to kvmalloc() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 17/37] x86/microcode/intel: Unify microcode apply() functions Thomas Gleixner
2023-08-12 19:59 ` [patch V2 18/37] x86/microcode/intel: Rework intel_cpu_collect_info() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 19/37] x86/microcode/intel: Reuse intel_cpu_collect_info() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 20/37] x86/microcode/intel: Rework intel_find_matching_signature() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 21/37] x86/microcode/amd: Read revision from hardware in collect_cpu_info_amd() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 22/37] x86/microcode: Remove pointless apply() invocation Thomas Gleixner
2023-08-12 19:59 ` [patch V2 23/37] x86/microcode: Get rid of the schedule work indirection Thomas Gleixner
2023-08-12 19:59 ` [patch V2 24/37] x86/microcode: Clean up mc_cpu_down_prep() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 25/37] x86/microcode: Handle "nosmt" correctly Thomas Gleixner
2023-08-12 19:59 ` [patch V2 26/37] x86/microcode: Clarify the late load logic Thomas Gleixner
2023-08-13 20:02   ` Nikolay Borisov
2023-08-12 19:59 ` [patch V2 27/37] x86/microcode: Sanitize __wait_for_cpus() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 28/37] x86/microcode: Add per CPU result state Thomas Gleixner
2023-08-12 19:59 ` [patch V2 29/37] x86/microcode: Add per CPU control field Thomas Gleixner
2023-08-12 19:59 ` [patch V2 30/37] x86/microcode: Provide new control functions Thomas Gleixner
2023-08-12 19:59 ` [patch V2 31/37] x86/microcode: Replace the all in one rendevouz handler Thomas Gleixner
2023-08-12 19:59 ` [patch V2 32/37] x86/microcode: Rendezvous and load in NMI Thomas Gleixner
2023-08-12 19:59 ` [patch V2 33/37] x86/microcode: Protect against instrumentation Thomas Gleixner
2023-08-12 19:59 ` [patch V2 34/37] x86/apic: Provide apic_force_nmi_on_cpu() Thomas Gleixner
2023-08-12 19:59 ` [patch V2 35/37] x86/microcode: Handle "offline" CPUs correctly Thomas Gleixner
2023-08-12 19:59 ` [patch V2 36/37] x86/microcode: Prepare for minimal revision check Thomas Gleixner
2023-08-12 19:59 ` [patch V2 37/37] x86/microcode/intel: Add a minimum required revision for late-loads Thomas Gleixner

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