All of lore.kernel.org
 help / color / mirror / Atom feed
From: Zeng Heng <zengheng4@huawei.com>
To: <will@kernel.org>, <catalin.marinas@arm.com>, <shuah@kernel.org>,
	<broonie@kernel.org>
Cc: <zengheng4@huawei.com>, <xiexiuqi@huawei.com>,
	<linux-kselftest@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH -next v2 4/4] kselftest/arm64: add jscvt feature to hwcap test
Date: Tue, 15 Aug 2023 12:09:15 +0800	[thread overview]
Message-ID: <20230815040915.3966955-5-zengheng4@huawei.com> (raw)
In-Reply-To: <20230815040915.3966955-1-zengheng4@huawei.com>

Add the jscvt feature check in the set of hwcap tests.

Due to the requirement of jscvt feature, a compiler configuration
of v8.3 or above is needed to support assembly. Therefore, hand
encode is used here instead.

Signed-off-by: Zeng Heng <zengheng4@huawei.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
---
 tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index df7a62659aa2..2683d0deb4c3 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -68,6 +68,12 @@ static void ilrcpc_sigill(void)
 	asm volatile(".inst 0x994083e0" : : : );
 }

+static void jscvt_sigill(void)
+{
+	/* FJCVTZS W0, D0 */
+	asm volatile(".inst 0x1e7e0000" : : : );
+}
+
 static void lrcpc_sigill(void)
 {
 	/* LDAPR W0, [SP, #0] */
@@ -320,6 +326,13 @@ static const struct hwcap_data {
 		.cpuinfo = "fp",
 		.sigill_fn = fp_sigill,
 	},
+	{
+		.name = "JSCVT",
+		.at_hwcap = AT_HWCAP,
+		.hwcap_bit = HWCAP_JSCVT,
+		.cpuinfo = "jscvt",
+		.sigill_fn = jscvt_sigill,
+	},
 	{
 		.name = "LRCPC",
 		.at_hwcap = AT_HWCAP,
--
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Zeng Heng <zengheng4@huawei.com>
To: <will@kernel.org>, <catalin.marinas@arm.com>, <shuah@kernel.org>,
	<broonie@kernel.org>
Cc: <zengheng4@huawei.com>, <xiexiuqi@huawei.com>,
	<linux-kselftest@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH -next v2 4/4] kselftest/arm64: add jscvt feature to hwcap test
Date: Tue, 15 Aug 2023 12:09:15 +0800	[thread overview]
Message-ID: <20230815040915.3966955-5-zengheng4@huawei.com> (raw)
In-Reply-To: <20230815040915.3966955-1-zengheng4@huawei.com>

Add the jscvt feature check in the set of hwcap tests.

Due to the requirement of jscvt feature, a compiler configuration
of v8.3 or above is needed to support assembly. Therefore, hand
encode is used here instead.

Signed-off-by: Zeng Heng <zengheng4@huawei.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
---
 tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index df7a62659aa2..2683d0deb4c3 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -68,6 +68,12 @@ static void ilrcpc_sigill(void)
 	asm volatile(".inst 0x994083e0" : : : );
 }

+static void jscvt_sigill(void)
+{
+	/* FJCVTZS W0, D0 */
+	asm volatile(".inst 0x1e7e0000" : : : );
+}
+
 static void lrcpc_sigill(void)
 {
 	/* LDAPR W0, [SP, #0] */
@@ -320,6 +326,13 @@ static const struct hwcap_data {
 		.cpuinfo = "fp",
 		.sigill_fn = fp_sigill,
 	},
+	{
+		.name = "JSCVT",
+		.at_hwcap = AT_HWCAP,
+		.hwcap_bit = HWCAP_JSCVT,
+		.cpuinfo = "jscvt",
+		.sigill_fn = jscvt_sigill,
+	},
 	{
 		.name = "LRCPC",
 		.at_hwcap = AT_HWCAP,
--
2.25.1


  parent reply	other threads:[~2023-08-15  4:13 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-15  4:09 [PATCH -next v2 0/4] kselftest/arm64: Add crypto-related feature checks to hwcap test Zeng Heng
2023-08-15  4:09 ` Zeng Heng
2023-08-15  4:09 ` [PATCH -next v2 1/4] kselftest/arm64: add SHA1 and related features " Zeng Heng
2023-08-15  4:09   ` Zeng Heng
2023-08-15  4:09 ` [PATCH -next v2 2/4] kselftest/arm64: add AES feature check " Zeng Heng
2023-08-15  4:09   ` Zeng Heng
2023-08-15  4:09 ` [PATCH -next v2 3/4] kselftest/arm64: add pmull feature " Zeng Heng
2023-08-15  4:09   ` Zeng Heng
2023-08-15  4:09 ` Zeng Heng [this message]
2023-08-15  4:09   ` [PATCH -next v2 4/4] kselftest/arm64: add jscvt " Zeng Heng
2023-08-16 18:25 ` [PATCH -next v2 0/4] kselftest/arm64: Add crypto-related feature checks " Will Deacon
2023-08-16 18:25   ` Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230815040915.3966955-5-zengheng4@huawei.com \
    --to=zengheng4@huawei.com \
    --cc=broonie@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kselftest@vger.kernel.org \
    --cc=shuah@kernel.org \
    --cc=will@kernel.org \
    --cc=xiexiuqi@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.