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From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: [PATCH 6.1.y-cip 14/15] arm64: dts: renesas: r9a07g043u: Add Cortex-A55 PMU node
Date: Mon, 21 Aug 2023 15:37:58 +0100	[thread overview]
Message-ID: <20230821143759.227105-15-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20230821143759.227105-1-biju.das.jz@bp.renesas.com>

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 805ed6d67b7b39b07fb65d4a76c986a1e49262cf upstream.

Enable the performance monitor unit for the Cortex-A55 core on the
RZ/G2UL (r9a07g043u) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230206001133.28776-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
index 9d854706ada5..1c9d3193e4ff 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -35,6 +35,11 @@ L3_CA55: cache-controller-0 {
 		};
 	};
 
+	pmu {
+		compatible = "arm,cortex-a55-pmu";
+		interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0", "arm,psci-0.2";
 		method = "smc";
-- 
2.25.1



  parent reply	other threads:[~2023-08-21 14:38 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-21 14:37 [PATCH 6.1.y-cip 00/15] RZ/G2{L,UL} Improvements Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 01/15] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 02/15] arm64: dts: renesas: rzg2ul-smarc: Move spi1 pinmux to carrier board DTSI Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 03/15] clk: renesas: r9a07g044: Drop WDT2 clock and reset entry Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 04/15] clk: renesas: r9a07g043: " Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 05/15] arm64: dts: renesas: rzg2l: Drop WDT2 nodes Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 06/15] arm64: dts: renesas: rzg2l: Drop #address-cells from pinctrl nodes Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 07/15] arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 08/15] pinctrl: renesas: Add missing header(s) Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 09/15] pinctrl: renesas: rzg2l: Add BUILD_BUG_ON() checks Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 10/15] arm64: dts: renesas: r9a07g043u: Add IRQC node Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 11/15] arm64: dts: renesas: r9a07g043u: Update pinctrl node to handle GPIO interrupts Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 12/15] arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for ETH{0/1} Biju Das
2023-08-21 14:37 ` [PATCH 6.1.y-cip 13/15] arm64: dts: renesas: rzg2l: Add missing cache-level properties Biju Das
2023-08-21 14:37 ` Biju Das [this message]
2023-08-21 14:37 ` [PATCH 6.1.y-cip 15/15] arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems Biju Das
2023-08-22  8:44 ` [PATCH 6.1.y-cip 00/15] RZ/G2{L,UL} Improvements Pavel Machek
2023-08-23  8:43   ` Pavel Machek

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