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From: Yang Yingliang <yangyingliang@huawei.com>
To: <linux-spi@vger.kernel.org>
Cc: <broonie@kernel.org>, <geert@linux-m68k.org>, <lukas@wunner.de>,
	<yangyingliang@huawei.com>
Subject: [PATCH -next 23/24] spi: zynq-qspi: switch to use modern name
Date: Tue, 22 Aug 2023 09:35:10 +0800	[thread overview]
Message-ID: <20230822013511.4161475-24-yangyingliang@huawei.com> (raw)
In-Reply-To: <20230822013511.4161475-1-yangyingliang@huawei.com>

Change legacy name master/slave to modern name host/target or controller.

No functional changed.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
 drivers/spi/spi-zynq-qspi.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index 0db69a2a72ff..d6325c6be3d4 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -54,10 +54,10 @@
 #define ZYNQ_QSPI_CONFIG_MSTREN_MASK	BIT(0) /* Master Mode */
 
 /*
- * QSPI Configuration Register - Baud rate and slave select
+ * QSPI Configuration Register - Baud rate and target select
  *
  * These are the values used in the calculation of baud rate divisor and
- * setting the slave select.
+ * setting the target select.
  */
 #define ZYNQ_QSPI_CONFIG_BAUD_DIV_MAX	GENMASK(2, 0) /* Baud rate maximum */
 #define ZYNQ_QSPI_CONFIG_BAUD_DIV_SHIFT	3 /* Baud rate divisor shift */
@@ -164,14 +164,14 @@ static inline void zynq_qspi_write(struct zynq_qspi *xqspi, u32 offset,
  *
  * The default settings of the QSPI controller's configurable parameters on
  * reset are
- *	- Master mode
+ *	- Host mode
  *	- Baud rate divisor is set to 2
  *	- Tx threshold set to 1l Rx threshold set to 32
  *	- Flash memory interface mode enabled
  *	- Size of the word to be transferred as 8 bit
  * This function performs the following actions
  *	- Disable and clear all the interrupts
- *	- Enable manual slave select
+ *	- Enable manual target select
  *	- Enable manual start
  *	- Deselect all the chip select lines
  *	- Set the size of the word to be transferred as 32 bit
@@ -289,7 +289,7 @@ static void zynq_qspi_txfifo_op(struct zynq_qspi *xqspi, unsigned int size)
  */
 static void zynq_qspi_chipselect(struct spi_device *spi, bool assert)
 {
-	struct spi_controller *ctlr = spi->master;
+	struct spi_controller *ctlr = spi->controller;
 	struct zynq_qspi *xqspi = spi_controller_get_devdata(ctlr);
 	u32 config_reg;
 
@@ -377,7 +377,7 @@ static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi)
  */
 static int zynq_qspi_setup_op(struct spi_device *spi)
 {
-	struct spi_controller *ctlr = spi->master;
+	struct spi_controller *ctlr = spi->controller;
 	struct zynq_qspi *qspi = spi_controller_get_devdata(ctlr);
 
 	if (ctlr->busy)
@@ -525,7 +525,7 @@ static irqreturn_t zynq_qspi_irq(int irq, void *dev_id)
 static int zynq_qspi_exec_mem_op(struct spi_mem *mem,
 				 const struct spi_mem_op *op)
 {
-	struct zynq_qspi *xqspi = spi_controller_get_devdata(mem->spi->master);
+	struct zynq_qspi *xqspi = spi_controller_get_devdata(mem->spi->controller);
 	int err = 0, i;
 	u8 *tmpbuf;
 
@@ -637,7 +637,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	struct zynq_qspi *xqspi;
 	u32 num_cs;
 
-	ctlr = spi_alloc_master(&pdev->dev, sizeof(*xqspi));
+	ctlr = spi_alloc_host(&pdev->dev, sizeof(*xqspi));
 	if (!ctlr)
 		return -ENOMEM;
 
@@ -647,14 +647,14 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	xqspi->regs = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(xqspi->regs)) {
 		ret = PTR_ERR(xqspi->regs);
-		goto remove_master;
+		goto remove_ctlr;
 	}
 
 	xqspi->pclk = devm_clk_get(&pdev->dev, "pclk");
 	if (IS_ERR(xqspi->pclk)) {
 		dev_err(&pdev->dev, "pclk clock not found.\n");
 		ret = PTR_ERR(xqspi->pclk);
-		goto remove_master;
+		goto remove_ctlr;
 	}
 
 	init_completion(&xqspi->data_completion);
@@ -663,13 +663,13 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	if (IS_ERR(xqspi->refclk)) {
 		dev_err(&pdev->dev, "ref_clk clock not found.\n");
 		ret = PTR_ERR(xqspi->refclk);
-		goto remove_master;
+		goto remove_ctlr;
 	}
 
 	ret = clk_prepare_enable(xqspi->pclk);
 	if (ret) {
 		dev_err(&pdev->dev, "Unable to enable APB clock.\n");
-		goto remove_master;
+		goto remove_ctlr;
 	}
 
 	ret = clk_prepare_enable(xqspi->refclk);
@@ -715,7 +715,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 
 	ret = devm_spi_register_controller(&pdev->dev, ctlr);
 	if (ret) {
-		dev_err(&pdev->dev, "spi_register_master failed\n");
+		dev_err(&pdev->dev, "devm_spi_register_controller failed\n");
 		goto clk_dis_all;
 	}
 
@@ -725,7 +725,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	clk_disable_unprepare(xqspi->refclk);
 clk_dis_pclk:
 	clk_disable_unprepare(xqspi->pclk);
-remove_master:
+remove_ctlr:
 	spi_controller_put(ctlr);
 
 	return ret;
-- 
2.25.1


  parent reply	other threads:[~2023-08-22  1:38 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-22  1:34 [PATCH -next 00/24] spi: switch to use modern name (part5) Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 01/24] spi: sprd-adi: switch to use spi_alloc_host() Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 02/24] spi: sprd: switch to use modern name Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 03/24] spi: st-ssc4: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 04/24] spi: stm32-qspi: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 05/24] spi: stm32: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 06/24] spi: sun4i: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 07/24] spi: sun6i: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 08/24] spi: sunplus-sp7021: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 09/24] spi: synquacer: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 10/24] spi: geni-qcom: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 11/24] spi: tegra114: " Yang Yingliang
2023-08-22  1:34 ` [PATCH -next 12/24] spi: tegra20-sflash: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 13/24] spi: tegra20-slink: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 14/24] spi: tegra210-quad: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 15/24] spi: spi-ti-qspi: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 16/24] spi: wpcm-fiu: switch to use devm_spi_alloc_host() Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 17/24] spi: topcliff-pch: switch to use modern name Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 18/24] spi: uniphier: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 19/24] spi: xcomm: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 20/24] spi: xilinx: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 21/24] spi: xlp: " Yang Yingliang
2023-08-22  1:35 ` [PATCH -next 22/24] spi: xtensa-xtfpga: " Yang Yingliang
2023-08-22  1:35 ` Yang Yingliang [this message]
2023-08-22  1:35 ` [PATCH -next 24/24] spi: zynqmp-gqspi: " Yang Yingliang

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