From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: [PATCH 5.10.y-cip 09/12] mfd: rz-mtu3: Replace raw_spin_lock->spin_lock()
Date: Tue, 12 Sep 2023 14:51:31 +0100 [thread overview]
Message-ID: <20230912135134.299576-10-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20230912135134.299576-1-biju.das.jz@bp.renesas.com>
commit d92df6fb812c5c126d1a3a06034bb2f2bb0e585f upstream.
As per kernel documentation, use raw_spinlock_t only in real critical core
code, low-level interrupt handling, and places where disabling preemption
or interrupts is required. Here the lock is for concurrent register access
from different drivers, hence spin_lock() is sufficient.
Reported-by: Pavel Machek <pavel@denx.de>
Closes: https://lore.kernel.org/all/ZIL%2FitcJvV5s3Bnf@duo.ucw.cz/
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Link: https://lore.kernel.org/r/20230815073445.9579-3-biju.das.jz@bp.renesas.com
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/mfd/rz-mtu3.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/rz-mtu3.c b/drivers/mfd/rz-mtu3.c
index e5cace963c7c..2400bf5830b9 100644
--- a/drivers/mfd/rz-mtu3.c
+++ b/drivers/mfd/rz-mtu3.c
@@ -21,7 +21,7 @@
struct rz_mtu3_priv {
void __iomem *mmio;
struct reset_control *rstc;
- raw_spinlock_t lock;
+ spinlock_t lock;
};
/******* MTU3 registers (original offset is +0x1200) *******/
@@ -175,11 +175,11 @@ void rz_mtu3_shared_reg_update_bit(struct rz_mtu3_channel *ch, u16 offset,
struct rz_mtu3_priv *priv = mtu->priv_data;
unsigned long tmdr, flags;
- raw_spin_lock_irqsave(&priv->lock, flags);
+ spin_lock_irqsave(&priv->lock, flags);
tmdr = rz_mtu3_shared_reg_read(ch, offset);
__assign_bit(pos, &tmdr, !!val);
rz_mtu3_shared_reg_write(ch, offset, tmdr);
- raw_spin_unlock_irqrestore(&priv->lock, flags);
+ spin_unlock_irqrestore(&priv->lock, flags);
}
EXPORT_SYMBOL_GPL(rz_mtu3_shared_reg_update_bit);
@@ -255,13 +255,13 @@ static void rz_mtu3_start_stop_ch(struct rz_mtu3_channel *ch, bool start)
bitpos = rz_mtu3_get_tstr_bit_pos(ch);
/* start stop register shared by multiple timer channels */
- raw_spin_lock_irqsave(&priv->lock, flags);
+ spin_lock_irqsave(&priv->lock, flags);
tstr = rz_mtu3_shared_reg_read(ch, offset);
__assign_bit(bitpos, &tstr, start);
rz_mtu3_shared_reg_write(ch, offset, tstr);
- raw_spin_unlock_irqrestore(&priv->lock, flags);
+ spin_unlock_irqrestore(&priv->lock, flags);
}
bool rz_mtu3_is_enabled(struct rz_mtu3_channel *ch)
@@ -276,9 +276,9 @@ bool rz_mtu3_is_enabled(struct rz_mtu3_channel *ch)
bitpos = rz_mtu3_get_tstr_bit_pos(ch);
/* start stop register shared by multiple timer channels */
- raw_spin_lock_irqsave(&priv->lock, flags);
+ spin_lock_irqsave(&priv->lock, flags);
tstr = rz_mtu3_shared_reg_read(ch, offset);
- raw_spin_unlock_irqrestore(&priv->lock, flags);
+ spin_unlock_irqrestore(&priv->lock, flags);
return tstr & BIT(bitpos);
}
@@ -348,7 +348,7 @@ static int rz_mtu3_probe(struct platform_device *pdev)
return PTR_ERR(ddata->clk);
reset_control_deassert(priv->rstc);
- raw_spin_lock_init(&priv->lock);
+ spin_lock_init(&priv->lock);
platform_set_drvdata(pdev, ddata);
for (i = 0; i < RZ_MTU_NUM_CHANNELS; i++) {
--
2.25.1
next prev parent reply other threads:[~2023-09-12 13:52 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-12 13:51 [PATCH 5.10.y-cip 00/12] Enable MTU3 PWM support on RZ/G2L SMARC Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 01/12] dmaengine: sh: rz-dmac: Improve cleanup order in probe()/remove() Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 02/12] dmaengine: sh: rz-dmac: Fix destination and source data size setting Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 03/12] clk: Fix undefined reference to `clk_rate_exclusive_{get,put}' Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 04/12] clk: renesas: r9a07g043: Add MTU3a clock and reset entry Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 05/12] pwm: rz-mtu3: Fix build warning 'num_channel_ios' not described Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 06/12] mfd: rz-mtu3: Fix COMPILE_TEST build error Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 07/12] mfd: rz-mtu3: Link time dependencies Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 08/12] mfd: rz-mtu3: Reduce critical sections Biju Das
2023-09-12 13:51 ` Biju Das [this message]
2023-09-12 13:51 ` [PATCH 5.10.y-cip 10/12] arm64: defconfig: Enable Renesas MTU3a PWM config Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 11/12] arm64: dts: renesas: rzg2l-smarc: Add support for enabling MTU3 Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 12/12] arm64: dts: renesas: rzg2lc-smarc: " Biju Das
2023-09-12 21:24 ` [PATCH 5.10.y-cip 00/12] Enable MTU3 PWM support on RZ/G2L SMARC Pavel Machek
2023-09-13 14:29 ` Pavel Machek
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