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From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: [PATCH 5.10.y-cip 12/12] arm64: dts: renesas: rzg2lc-smarc: Add support for enabling MTU3
Date: Tue, 12 Sep 2023 14:51:34 +0100	[thread overview]
Message-ID: <20230912135134.299576-13-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20230912135134.299576-1-biju.das.jz@bp.renesas.com>

commit 5d7de61ff17f152fb34db1347f53a80d41f511de upstream.

Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2LC SMARC
EVK.

The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when
PMOD_MTU3 macro is enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230707155849.86649-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts  | 12 ++++++++++++
 .../boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi |  9 +++++++++
 arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi      | 14 +++++++++++++-
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
index f67a6f125d9c..0b90367b6d1e 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
@@ -35,6 +35,18 @@
 /* comment the #define statement to disable SCIF1 (SER0) on PMOD1 (CN7) */
 #define PMOD1_SER0	1
 
+/*
+ * To enable MTU3a PWM on PMOD0,
+ *  - Set DIP-Switch SW1-4 to Off position.
+ *  - Set SW_RSPI_CAN macro to 0.
+ *  - Set PMOD_MTU3 macro to 1.
+ */
+#define PMOD_MTU3	0
+
+#if (PMOD_MTU3 && SW_RSPI_CAN)
+#error "Cannot set as both PMOD_MTU3 and SW_RSPI_CAN are mutually exclusive"
+#endif
+
 #include "r9a07g044c2.dtsi"
 #include "rzg2lc-smarc-som.dtsi"
 #include "rzg2lc-smarc.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi
index a78a8def363e..92c64d58349f 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi
@@ -50,6 +50,15 @@ i2c2_pins: i2c2 {
 			 <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
 	};
 
+	mtu3_pins: mtu3 {
+		mtu3-pwm {
+			pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
+				 <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */
+				 <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */
+				 <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */
+		};
+	};
+
 	scif0_pins: scif0 {
 		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
 			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
index b6bd27196d88..664318e3dfb6 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
@@ -11,7 +11,6 @@
 #include "rzg2lc-smarc-pinfunction.dtsi"
 #include "rz-smarc-common.dtsi"
 
-
 / {
 	aliases {
 		serial1 = &scif1;
@@ -50,6 +49,19 @@ wm8978: codec@1a {
 	};
 };
 
+#if PMOD_MTU3
+&mtu3 {
+	pinctrl-0 = <&mtu3_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&spi1 {
+	status = "disabled";
+};
+#endif
+
 /*
  * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board
  * SW1 should be at position 2->3 so that SER0_CTS# line is activated
-- 
2.25.1



  parent reply	other threads:[~2023-09-12 13:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-12 13:51 [PATCH 5.10.y-cip 00/12] Enable MTU3 PWM support on RZ/G2L SMARC Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 01/12] dmaengine: sh: rz-dmac: Improve cleanup order in probe()/remove() Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 02/12] dmaengine: sh: rz-dmac: Fix destination and source data size setting Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 03/12] clk: Fix undefined reference to `clk_rate_exclusive_{get,put}' Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 04/12] clk: renesas: r9a07g043: Add MTU3a clock and reset entry Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 05/12] pwm: rz-mtu3: Fix build warning 'num_channel_ios' not described Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 06/12] mfd: rz-mtu3: Fix COMPILE_TEST build error Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 07/12] mfd: rz-mtu3: Link time dependencies Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 08/12] mfd: rz-mtu3: Reduce critical sections Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 09/12] mfd: rz-mtu3: Replace raw_spin_lock->spin_lock() Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 10/12] arm64: defconfig: Enable Renesas MTU3a PWM config Biju Das
2023-09-12 13:51 ` [PATCH 5.10.y-cip 11/12] arm64: dts: renesas: rzg2l-smarc: Add support for enabling MTU3 Biju Das
2023-09-12 13:51 ` Biju Das [this message]
2023-09-12 21:24 ` [PATCH 5.10.y-cip 00/12] Enable MTU3 PWM support on RZ/G2L SMARC Pavel Machek
2023-09-13 14:29 ` Pavel Machek

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