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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/5] drm/i915/fbc: Split plane rotation checks per-platform
Date: Thu, 14 Sep 2023 14:38:53 +0300	[thread overview]
Message-ID: <20230914113854.10008-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230914113854.10008-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Carve up rotation_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.

TODO: maybe go for vfuncs later

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 30 +++++++++++++++++++-----
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 052f9d8b53d4..1a6931e66d5d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -935,22 +935,40 @@ static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
 	}
 }
 
-static bool rotation_is_valid(const struct intel_plane_state *plane_state)
+static bool i8xx_fbc_rotation_is_valid(const struct intel_plane_state *plane_state)
+{
+	return plane_state->hw.rotation == DRM_MODE_ROTATE_0;
+}
+
+static bool g4x_fbc_rotation_is_valid(const struct intel_plane_state *plane_state)
+{
+	return true;
+}
+
+static bool skl_fbc_rotation_is_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
 	unsigned int rotation = plane_state->hw.rotation;
 
-	if (DISPLAY_VER(i915) >= 9 && fb->format->format == DRM_FORMAT_RGB565 &&
+	if (fb->format->format == DRM_FORMAT_RGB565 &&
 	    drm_rotation_90_or_270(rotation))
 		return false;
-	else if (DISPLAY_VER(i915) <= 4 && !IS_G4X(i915) &&
-		 rotation != DRM_MODE_ROTATE_0)
-		return false;
 
 	return true;
 }
 
+static bool rotation_is_valid(const struct intel_plane_state *plane_state)
+{
+	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+
+	if (DISPLAY_VER(i915) >= 9)
+		return skl_fbc_rotation_is_valid(plane_state);
+	else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+		return g4x_fbc_rotation_is_valid(plane_state);
+	else
+		return i8xx_fbc_rotation_is_valid(plane_state);
+}
+
 /*
  * For some reason, the hardware tracking starts looking at whatever we
  * programmed as the display plane base address register. It does not look at
-- 
2.41.0


  parent reply	other threads:[~2023-09-14 11:39 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-14 11:38 [Intel-gfx] [PATCH 1/5] drm/i915/fbc: Remove ancient 16k plane stride limit Ville Syrjala
2023-09-14 11:38 ` [Intel-gfx] [PATCH 2/5] drm/i915/fbc: Split plane stride checks per-platform Ville Syrjala
2023-10-01 10:53   ` Govindapillai, Vinod
2023-10-02  7:02     ` Ville Syrjälä
2023-10-02  7:32       ` Govindapillai, Vinod
2023-09-14 11:38 ` [Intel-gfx] [PATCH 3/5] drm/i915/fbc: Split plane tiling " Ville Syrjala
2023-10-01 11:00   ` Govindapillai, Vinod
2023-10-02  6:55     ` Ville Syrjälä
2023-09-14 11:38 ` Ville Syrjala [this message]
2023-10-01 11:03   ` [Intel-gfx] [PATCH 4/5] drm/i915/fbc: Split plane rotation " Govindapillai, Vinod
2023-09-14 11:38 ` [Intel-gfx] [PATCH 5/5] drm/i915/fbc: Split plane pixel format " Ville Syrjala
2023-10-01 11:08   ` Govindapillai, Vinod
2023-09-14 20:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/fbc: Remove ancient 16k plane stride limit Patchwork
2023-09-15  5:15 ` [Intel-gfx] [PATCH 1/5] " Sharma, Swati2
2023-09-15 16:48 ` Matt Roper
2023-09-15 16:54   ` Ville Syrjälä
2023-09-29 13:08 ` Juha-Pekka Heikkila
2023-09-29 16:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/fbc: Remove ancient 16k plane stride limit (rev2) Patchwork
2023-09-29 23:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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