From: Biju Das <biju.das.jz@bp.renesas.com>
To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Biju Das <biju.das.au@gmail.com>,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org
Subject: [PATCH 1/3] irqchip: renesas-rzg2l: Fix logic to clear TINT interrupt source
Date: Mon, 18 Sep 2023 13:24:09 +0100 [thread overview]
Message-ID: <20230918122411.237635-2-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20230918122411.237635-1-biju.das.jz@bp.renesas.com>
The logic to clear the TINT interrupt source in rzg2l_irqc_irq_disable()
is wrong as the mask is correct only for LSB on the TSSR register.
This issue is found when testing with two TINT interrupt sources. So fix
the logic for all TINTs by using the macro TSSEL_SHIFT() to multiply
tssr_offset with 8.
Fixes: 3fed09559cd8 ("irqchip: Add RZ/G2L IA55 Interrupt Controller driver")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
drivers/irqchip/irq-renesas-rzg2l.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c
index 4bbfa2b0a4df..2cee5477be6b 100644
--- a/drivers/irqchip/irq-renesas-rzg2l.c
+++ b/drivers/irqchip/irq-renesas-rzg2l.c
@@ -118,7 +118,7 @@ static void rzg2l_irqc_irq_disable(struct irq_data *d)
raw_spin_lock(&priv->lock);
reg = readl_relaxed(priv->base + TSSR(tssr_index));
- reg &= ~(TSSEL_MASK << tssr_offset);
+ reg &= ~(TSSEL_MASK << TSSEL_SHIFT(tssr_offset));
writel_relaxed(reg, priv->base + TSSR(tssr_index));
raw_spin_unlock(&priv->lock);
}
--
2.25.1
next prev parent reply other threads:[~2023-09-18 12:25 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-18 12:24 [PATCH 0/3] Fix IRQ storm with GPIO interrupts Biju Das
2023-09-18 12:24 ` Biju Das [this message]
2023-09-18 12:38 ` [PATCH 1/3] irqchip: renesas-rzg2l: Fix logic to clear TINT interrupt source Geert Uytterhoeven
2023-09-19 5:56 ` claudiu beznea
2023-09-24 9:31 ` [irqchip: irq/irqchip-fixes] " irqchip-bot for Biju Das
2023-09-18 12:24 ` [PATCH 2/3] irqchip: renesas-rzg2l: Mask interrupts for changing interrupt settings Biju Das
2023-09-24 9:27 ` Marc Zyngier
2023-09-25 8:51 ` Biju Das
2023-09-18 12:24 ` [PATCH 3/3] irqchip: renesas-rzg2l: Fix irq storm with edge trigger detection for TINT Biju Das
2023-09-19 14:37 ` Marc Zyngier
2023-09-19 15:24 ` Biju Das
2023-09-19 16:19 ` Marc Zyngier
2023-09-19 16:32 ` Biju Das
2023-09-19 16:49 ` Marc Zyngier
2023-09-19 17:06 ` Biju Das
2023-09-21 7:55 ` Marc Zyngier
2023-09-22 14:34 ` Biju Das
2023-10-06 10:46 ` Biju Das
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230918122411.237635-2-biju.das.jz@bp.renesas.com \
--to=biju.das.jz@bp.renesas.com \
--cc=biju.das.au@gmail.com \
--cc=claudiu.beznea.uj@bp.renesas.com \
--cc=geert+renesas@glider.be \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=maz@kernel.org \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.