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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org,
	"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Pali Rohár" <pali@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH v3 5/8] PCI: mvebu: Use FIELD_PREP() with Link Width
Date: Tue, 19 Sep 2023 15:56:45 +0300	[thread overview]
Message-ID: <20230919125648.1920-6-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20230919125648.1920-1-ilpo.jarvinen@linux.intel.com>

mvebu_pcie_setup_hw() setups the Maximum Link Width field in the Link
Capabilities registers using an open-coded variant of FIELD_PREP() with
a literal in shift. Improve readability by using
FIELD_PREP(PCI_EXP_LNKCAP_MLW, ...).

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 drivers/pci/controller/pci-mvebu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 60810a1fbfb7..29fe09c99e7d 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -264,7 +264,7 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
 	 */
 	lnkcap = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);
 	lnkcap &= ~PCI_EXP_LNKCAP_MLW;
-	lnkcap |= (port->is_x4 ? 4 : 1) << 4;
+	lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, port->is_x4 ? 4 : 1);
 	mvebu_writel(port, lnkcap, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);
 
 	/* Disable Root Bridge I/O space, memory space and bus mastering. */
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org,
	"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Pali Rohár" <pali@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH v3 5/8] PCI: mvebu: Use FIELD_PREP() with Link Width
Date: Tue, 19 Sep 2023 15:56:45 +0300	[thread overview]
Message-ID: <20230919125648.1920-6-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20230919125648.1920-1-ilpo.jarvinen@linux.intel.com>

mvebu_pcie_setup_hw() setups the Maximum Link Width field in the Link
Capabilities registers using an open-coded variant of FIELD_PREP() with
a literal in shift. Improve readability by using
FIELD_PREP(PCI_EXP_LNKCAP_MLW, ...).

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 drivers/pci/controller/pci-mvebu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 60810a1fbfb7..29fe09c99e7d 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -264,7 +264,7 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
 	 */
 	lnkcap = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);
 	lnkcap &= ~PCI_EXP_LNKCAP_MLW;
-	lnkcap |= (port->is_x4 ? 4 : 1) << 4;
+	lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, port->is_x4 ? 4 : 1);
 	mvebu_writel(port, lnkcap, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);
 
 	/* Disable Root Bridge I/O space, memory space and bus mastering. */
-- 
2.30.2


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  parent reply	other threads:[~2023-09-19 12:57 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-19 12:56 [PATCH v3 0/8] PCI/treewide: PCIe capability access cleanups Ilpo Järvinen
2023-09-19 12:56 ` [PATCH v3 1/8] RDMA/hfi1: Use FIELD_GET() to extract Link Width Ilpo Järvinen
2023-09-19 13:11   ` Dean Luick
2023-09-19 12:56 ` [PATCH v3 2/8] media: cobalt: " Ilpo Järvinen
2023-09-19 12:56 ` [PATCH v3 3/8] igb: " Ilpo Järvinen
2023-09-19 12:56   ` [Intel-wired-lan] " Ilpo Järvinen
2023-09-19 12:56 ` [PATCH v3 4/8] PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields Ilpo Järvinen
2023-09-19 12:56 ` Ilpo Järvinen [this message]
2023-09-19 12:56   ` [PATCH v3 5/8] PCI: mvebu: Use FIELD_PREP() with Link Width Ilpo Järvinen
2023-09-19 12:56 ` [PATCH v3 6/8] PCI: Use FIELD_GET() to extract " Ilpo Järvinen
2023-09-19 12:56 ` [PATCH v3 7/8] e1000e: Use PCI_EXP_LNKSTA_NLW & FIELD_GET() instead of custom defines/code Ilpo Järvinen
2023-09-19 12:56   ` [Intel-wired-lan] " Ilpo Järvinen
2023-09-19 12:56 ` [PATCH v3 8/8] e1000e: Use pcie_capability_read_word() for reading LNKSTA Ilpo Järvinen
2023-09-19 12:56   ` [Intel-wired-lan] " Ilpo Järvinen
2023-09-19 13:27   ` Jonathan Cameron
2023-09-19 13:27     ` [Intel-wired-lan] " Jonathan Cameron
2023-09-20  7:31 ` (subset) [PATCH v3 0/8] PCI/treewide: PCIe capability access cleanups Leon Romanovsky
2023-09-20  7:32 ` Leon Romanovsky
2023-10-10 20:38 ` Bjorn Helgaas

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