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From: Yu Chien Peter Lin <peterlin@andestech.com>
To: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	<aou@eecs.berkeley.edu>, <david@redhat.com>,
	<akpm@linux-foundation.org>, <alexghiti@rivosinc.com>,
	<bjorn@rivosinc.com>, <linux-riscv@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: <conor.dooley@microchip.com>,
	Yu Chien Peter Lin <peterlin@andestech.com>
Subject: [PATCH v4 2/3] riscv: Introduce PBMT field to PTDUMP
Date: Thu, 21 Sep 2023 10:50:21 +0800	[thread overview]
Message-ID: <20230921025022.3989723-3-peterlin@andestech.com> (raw)
In-Reply-To: <20230921025022.3989723-1-peterlin@andestech.com>

This patch introduces the PBMT field to the PTDUMP, so it can
display the memory attributes for NC or IO.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
---
Changes v1 -> v2
- no change
Changes v2 -> v3
- Add ".." when PBMT field is clear
Changes v3 -> v4
- Include Alexandre's RB/TB-tags
---
 arch/riscv/mm/ptdump.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/riscv/mm/ptdump.c b/arch/riscv/mm/ptdump.c
index 57a0926c6627..13997cf3fe36 100644
--- a/arch/riscv/mm/ptdump.c
+++ b/arch/riscv/mm/ptdump.c
@@ -135,6 +135,12 @@ struct prot_bits {
 
 static const struct prot_bits pte_bits[] = {
 	{
+#ifdef CONFIG_64BIT
+		.mask = _PAGE_MTMASK_SVPBMT,
+		.set = "MT(%s)",
+		.clear = "  ..  ",
+	}, {
+#endif
 		.mask = _PAGE_SOFT,
 		.set = "RSW(%d)",
 		.clear = "  ..  ",
@@ -205,6 +211,16 @@ static void dump_prot(struct pg_state *st)
 		if (val) {
 			if (pte_bits[i].mask == _PAGE_SOFT)
 				sprintf(s, pte_bits[i].set, val >> 8);
+#ifdef CONFIG_64BIT
+			else if (pte_bits[i].mask == _PAGE_MTMASK_SVPBMT) {
+				if (val == _PAGE_NOCACHE_SVPBMT)
+					sprintf(s, pte_bits[i].set, "NC");
+				else if (val == _PAGE_IO_SVPBMT)
+					sprintf(s, pte_bits[i].set, "IO");
+				else
+					sprintf(s, pte_bits[i].set, "??");
+			}
+#endif
 			else
 				sprintf(s, "%s", pte_bits[i].set);
 		} else {
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Yu Chien Peter Lin <peterlin@andestech.com>
To: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	<aou@eecs.berkeley.edu>, <david@redhat.com>,
	<akpm@linux-foundation.org>, <alexghiti@rivosinc.com>,
	<bjorn@rivosinc.com>, <linux-riscv@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: <conor.dooley@microchip.com>,
	Yu Chien Peter Lin <peterlin@andestech.com>
Subject: [PATCH v4 2/3] riscv: Introduce PBMT field to PTDUMP
Date: Thu, 21 Sep 2023 10:50:21 +0800	[thread overview]
Message-ID: <20230921025022.3989723-3-peterlin@andestech.com> (raw)
In-Reply-To: <20230921025022.3989723-1-peterlin@andestech.com>

This patch introduces the PBMT field to the PTDUMP, so it can
display the memory attributes for NC or IO.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
---
Changes v1 -> v2
- no change
Changes v2 -> v3
- Add ".." when PBMT field is clear
Changes v3 -> v4
- Include Alexandre's RB/TB-tags
---
 arch/riscv/mm/ptdump.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/riscv/mm/ptdump.c b/arch/riscv/mm/ptdump.c
index 57a0926c6627..13997cf3fe36 100644
--- a/arch/riscv/mm/ptdump.c
+++ b/arch/riscv/mm/ptdump.c
@@ -135,6 +135,12 @@ struct prot_bits {
 
 static const struct prot_bits pte_bits[] = {
 	{
+#ifdef CONFIG_64BIT
+		.mask = _PAGE_MTMASK_SVPBMT,
+		.set = "MT(%s)",
+		.clear = "  ..  ",
+	}, {
+#endif
 		.mask = _PAGE_SOFT,
 		.set = "RSW(%d)",
 		.clear = "  ..  ",
@@ -205,6 +211,16 @@ static void dump_prot(struct pg_state *st)
 		if (val) {
 			if (pte_bits[i].mask == _PAGE_SOFT)
 				sprintf(s, pte_bits[i].set, val >> 8);
+#ifdef CONFIG_64BIT
+			else if (pte_bits[i].mask == _PAGE_MTMASK_SVPBMT) {
+				if (val == _PAGE_NOCACHE_SVPBMT)
+					sprintf(s, pte_bits[i].set, "NC");
+				else if (val == _PAGE_IO_SVPBMT)
+					sprintf(s, pte_bits[i].set, "IO");
+				else
+					sprintf(s, pte_bits[i].set, "??");
+			}
+#endif
 			else
 				sprintf(s, "%s", pte_bits[i].set);
 		} else {
-- 
2.34.1


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  parent reply	other threads:[~2023-09-21  2:50 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-21  2:50 [PATCH v4 0/3] Improve PTDUMP and introduce new fields Yu Chien Peter Lin
2023-09-21  2:50 ` Yu Chien Peter Lin
2023-09-21  2:50 ` [PATCH v4 1/3] riscv: Improve PTDUMP to show RSW with non-zero value Yu Chien Peter Lin
2023-09-21  2:50   ` Yu Chien Peter Lin
2023-09-21  2:50 ` Yu Chien Peter Lin [this message]
2023-09-21  2:50   ` [PATCH v4 2/3] riscv: Introduce PBMT field to PTDUMP Yu Chien Peter Lin
2023-09-21  2:50 ` [PATCH v4 3/3] riscv: Introduce NAPOT " Yu Chien Peter Lin
2023-09-21  2:50   ` Yu Chien Peter Lin
2023-11-06 15:00 ` [PATCH v4 0/3] Improve PTDUMP and introduce new fields patchwork-bot+linux-riscv
2023-11-06 15:00   ` patchwork-bot+linux-riscv

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