From: Claudiu <claudiu.beznea@tuxon.dev> To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org, quic_bjorande@quicinc.com, konrad.dybcio@linaro.org, arnd@arndb.de, neil.armstrong@linaro.org, prabhakar.mahadev-lad.rj@bp.renesas.com, biju.das.jz@bp.renesas.com Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 06/28] clk: renesas: rzg2l: remove critical area Date: Fri, 29 Sep 2023 08:38:53 +0300 [thread overview] Message-ID: <20230929053915.1530607-7-claudiu.beznea@bp.renesas.com> (raw) In-Reply-To: <20230929053915.1530607-1-claudiu.beznea@bp.renesas.com> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> spinlock in rzg2l_mod_clock_endisable() is intended to protect the accesses to hardware register. There is no need to protect the instructions that set temporary variable which will be then written to register. With this only one write to one clock register is executed thus locking/unlocking rmw_lock is removed. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> --- Changes in v2: - removed also the spinlock - s/reduce/remove in patch title drivers/clk/renesas/rzg2l-cpg.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index f411e428196c..d936832e098f 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -895,7 +895,6 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) struct rzg2l_cpg_priv *priv = clock->priv; unsigned int reg = clock->off; struct device *dev = priv->dev; - unsigned long flags; u32 bitmask = BIT(clock->bit); u32 value; int error; @@ -907,14 +906,12 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, enable ? "ON" : "OFF"); - spin_lock_irqsave(&priv->rmw_lock, flags); value = bitmask << 16; if (enable) value |= bitmask; - writel(value, priv->base + CLK_ON_R(reg)); - spin_unlock_irqrestore(&priv->rmw_lock, flags); + writel(value, priv->base + CLK_ON_R(reg)); if (!enable) return 0; -- 2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Claudiu <claudiu.beznea@tuxon.dev> To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org, quic_bjorande@quicinc.com, konrad.dybcio@linaro.org, arnd@arndb.de, neil.armstrong@linaro.org, prabhakar.mahadev-lad.rj@bp.renesas.com, biju.das.jz@bp.renesas.com Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 06/28] clk: renesas: rzg2l: remove critical area Date: Fri, 29 Sep 2023 08:38:53 +0300 [thread overview] Message-ID: <20230929053915.1530607-7-claudiu.beznea@bp.renesas.com> (raw) In-Reply-To: <20230929053915.1530607-1-claudiu.beznea@bp.renesas.com> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> spinlock in rzg2l_mod_clock_endisable() is intended to protect the accesses to hardware register. There is no need to protect the instructions that set temporary variable which will be then written to register. With this only one write to one clock register is executed thus locking/unlocking rmw_lock is removed. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> --- Changes in v2: - removed also the spinlock - s/reduce/remove in patch title drivers/clk/renesas/rzg2l-cpg.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index f411e428196c..d936832e098f 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -895,7 +895,6 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) struct rzg2l_cpg_priv *priv = clock->priv; unsigned int reg = clock->off; struct device *dev = priv->dev; - unsigned long flags; u32 bitmask = BIT(clock->bit); u32 value; int error; @@ -907,14 +906,12 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, enable ? "ON" : "OFF"); - spin_lock_irqsave(&priv->rmw_lock, flags); value = bitmask << 16; if (enable) value |= bitmask; - writel(value, priv->base + CLK_ON_R(reg)); - spin_unlock_irqrestore(&priv->rmw_lock, flags); + writel(value, priv->base + CLK_ON_R(reg)); if (!enable) return 0; -- 2.39.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-09-29 5:40 UTC|newest] Thread overview: 134+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-09-29 5:38 [PATCH v2 00/28] Add new Renesas RZ/G3S SoC and RZ/G3S SMARC EVK Claudiu 2023-09-29 5:38 ` Claudiu 2023-09-29 5:38 ` [PATCH v2 01/28] dt-bindings: serial: renesas,scif: document r9a08g045 support Claudiu 2023-09-29 5:38 ` Claudiu 2023-09-29 5:38 ` [PATCH v2 02/28] clk: renesas: rzg2l: wait for status bit of SD mux before continuing Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-03 15:14 ` Geert Uytterhoeven 2023-10-03 15:14 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 03/28] clk: renesas: rzg2l: lock around writes to mux register Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-03 15:18 ` Geert Uytterhoeven 2023-10-03 15:18 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 04/28] clk: renesas: rzg2l: trust value returned by hardware Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-03 15:19 ` Geert Uytterhoeven 2023-10-03 15:19 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 05/28] clk: renesas: rzg2l: fix computation formula Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-04 8:08 ` Geert Uytterhoeven 2023-10-04 8:08 ` Geert Uytterhoeven 2023-09-29 5:38 ` Claudiu [this message] 2023-09-29 5:38 ` [PATCH v2 06/28] clk: renesas: rzg2l: remove critical area Claudiu 2023-10-04 8:11 ` Geert Uytterhoeven 2023-10-04 8:11 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 07/28] clk: renesas: rzg2l: add support for RZ/G3S PLL Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-04 8:45 ` Geert Uytterhoeven 2023-10-04 8:45 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 08/28] clk: renesas: rzg2l: add struct clk_hw_data Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-04 8:47 ` Geert Uytterhoeven 2023-10-04 8:47 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 09/28] clk: renesas: rzg2l: remove CPG_SDHI_DSEL from generic header Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-04 8:50 ` Geert Uytterhoeven 2023-10-04 8:50 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 10/28] clk: renesas: rzg2l: refactor sd mux driver Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-04 11:30 ` Geert Uytterhoeven 2023-10-04 11:30 ` Geert Uytterhoeven 2023-10-05 4:24 ` claudiu beznea 2023-10-05 4:24 ` claudiu beznea 2023-09-29 5:38 ` [PATCH v2 11/28] clk: renesas: rzg2l: add a divider clock for RZ/G3S Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-04 12:30 ` Geert Uytterhoeven 2023-10-04 12:30 ` Geert Uytterhoeven 2023-10-05 5:04 ` claudiu beznea 2023-10-05 5:04 ` claudiu beznea 2023-10-09 11:57 ` Geert Uytterhoeven 2023-10-09 11:57 ` Geert Uytterhoeven 2023-09-29 5:38 ` [PATCH v2 12/28] dt-bindings: clock: renesas,rzg2l-cpg: document RZ/G3S SoC Claudiu 2023-09-29 5:38 ` Claudiu 2023-10-04 12:37 ` Geert Uytterhoeven 2023-10-04 12:37 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 13/28] clk: renesas: add minimal boot support for " Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 12:41 ` Geert Uytterhoeven 2023-10-04 12:41 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 14/28] pinctrl: renesas: rzg2l: index all registers based on port offset Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 12:52 ` Geert Uytterhoeven 2023-10-04 12:52 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 15/28] pinctrl: renesas: rzg2l: adapt for different SD/PWPR register offsets Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 12:57 ` Geert Uytterhoeven 2023-10-04 12:57 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 16/28] pinctrl: renesas: rzg2l: adapt function number for RZ/G3S Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 12:58 ` Geert Uytterhoeven 2023-10-04 12:58 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 17/28] pinctrl: renesas: rzg2l: move ds and oi to SoC specific configuration Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 13:18 ` Geert Uytterhoeven 2023-10-04 13:18 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 18/28] pinctrl: renesas: rzg2l: add support for different ds values on different groups Claudiu 2023-09-29 5:39 ` Claudiu 2023-09-29 9:24 ` Paul Barker 2023-09-29 9:24 ` Paul Barker 2023-10-04 13:17 ` Geert Uytterhoeven 2023-10-04 13:17 ` Geert Uytterhoeven 2023-10-05 5:05 ` claudiu beznea 2023-10-05 5:05 ` claudiu beznea 2023-10-05 10:04 ` Geert Uytterhoeven 2023-10-05 10:04 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 19/28] dt-bindings: pinctrl: renesas: set additionalProperties: false Claudiu 2023-09-29 5:39 ` Claudiu 2023-09-29 14:09 ` Conor Dooley 2023-09-29 14:09 ` Conor Dooley 2023-10-02 14:50 ` Rob Herring 2023-10-02 14:50 ` Rob Herring 2023-10-03 3:57 ` claudiu beznea 2023-10-03 3:57 ` claudiu beznea 2023-09-29 5:39 ` [PATCH v2 20/28] dt-bindings: pinctrl: renesas: document RZ/G3S SoC Claudiu 2023-09-29 5:39 ` Claudiu 2023-09-29 14:07 ` Conor Dooley 2023-09-29 14:07 ` Conor Dooley 2023-10-04 13:21 ` Geert Uytterhoeven 2023-10-04 13:21 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 21/28] pinctrl: renesas: rzg2l: add support for " Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 13:24 ` Geert Uytterhoeven 2023-10-04 13:24 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 22/28] arm64: dts: renesas: add initial DTSI " Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 13:29 ` Geert Uytterhoeven 2023-10-04 13:29 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 23/28] dt-bindings: arm: renesas: document RZ/G3S SMARC SoM Claudiu 2023-09-29 5:39 ` Claudiu 2023-09-29 14:05 ` Conor Dooley 2023-09-29 14:05 ` Conor Dooley 2023-10-04 13:28 ` Geert Uytterhoeven 2023-10-04 13:28 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 24/28] arm64: dts: renesas: rzg3l-smarc-som: add initial support for " Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 13:30 ` Geert Uytterhoeven 2023-10-04 13:30 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 25/28] arm64: dts: renesas: rzg3s-smarc: add initial device tree for RZ SMARC Carrier-II Board Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 13:31 ` Geert Uytterhoeven 2023-10-04 13:31 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 26/28] dt-bindings: arm: renesas: document SMARC Carrier-II EVK Claudiu 2023-09-29 5:39 ` Claudiu 2023-09-29 14:05 ` Conor Dooley 2023-09-29 14:05 ` Conor Dooley 2023-10-04 13:32 ` Geert Uytterhoeven 2023-10-04 13:32 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 27/28] arm64: dts: renesas: r9a08g045s33-smarc: add initial device tree for RZ/G3S SMARC EVK board Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 13:33 ` Geert Uytterhoeven 2023-10-04 13:33 ` Geert Uytterhoeven 2023-09-29 5:39 ` [PATCH v2 28/28] arm64: defconfig: enable RZ/G3S (R9A08G045) SoC Claudiu 2023-09-29 5:39 ` Claudiu 2023-10-04 13:34 ` Geert Uytterhoeven 2023-10-04 13:34 ` Geert Uytterhoeven
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