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From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-rockchip@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	Heiko Stuebner <heiko@sntech.de>,
	Chanwoo Choi <chanwoo@kernel.org>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	kernel@pengutronix.de,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Robin Murphy <robin.murphy@arm.com>,
	Vincent Legoll <vincent.legoll@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Chanwoo Choi <cw00.choi@samsung.com>
Subject: [PATCH v8 08/26] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines
Date: Wed, 18 Oct 2023 08:16:56 +0200	[thread overview]
Message-ID: <20231018061714.3553817-9-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20231018061714.3553817-1-s.hauer@pengutronix.de>

The DDRTYPE defines are named to be RK3399 specific, but they can be
used for other Rockchip SoCs as well, so replace the RK3399_PMUGRF_
prefix with ROCKCHIP_. They are defined in a SoC specific header
file, so when generalizing the prefix also move the new defines to
a SoC agnostic header file. While at it use GENMASK to define the
DDRTYPE bitfield and give it a name including the full register name.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/devfreq/event/rockchip-dfi.c |  9 +++++----
 drivers/devfreq/rk3399_dmc.c         | 10 +++++-----
 include/soc/rockchip/rk3399_grf.h    |  7 +------
 include/soc/rockchip/rockchip_grf.h  | 17 +++++++++++++++++
 4 files changed, 28 insertions(+), 15 deletions(-)
 create mode 100644 include/soc/rockchip/rockchip_grf.h

diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 28c18bbf6baa5..82d18c60538a5 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -18,8 +18,10 @@
 #include <linux/list.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/bitfield.h>
 #include <linux/bits.h>
 
+#include <soc/rockchip/rockchip_grf.h>
 #include <soc/rockchip/rk3399_grf.h>
 
 #define DMC_MAX_CHANNELS	2
@@ -75,9 +77,9 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
 	writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
 
 	/* set ddr type to dfi */
-	if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
+	if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
 		writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
-	else if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
+	else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
 		writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
 
 	/* enable count, use software mode */
@@ -192,8 +194,7 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
 
 	/* get ddr type */
 	regmap_read(regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
-	dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
-			RK3399_PMUGRF_DDRTYPE_MASK;
+	dfi->ddr_type = FIELD_GET(RK3399_PMUGRF_OS_REG2_DDRTYPE, val);
 
 	dfi->channel_mask = GENMASK(1, 0);
 	dfi->max_channels = 2;
diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
index daff407026157..fd2c5ffedf41e 100644
--- a/drivers/devfreq/rk3399_dmc.c
+++ b/drivers/devfreq/rk3399_dmc.c
@@ -22,6 +22,7 @@
 #include <linux/suspend.h>
 
 #include <soc/rockchip/pm_domains.h>
+#include <soc/rockchip/rockchip_grf.h>
 #include <soc/rockchip/rk3399_grf.h>
 #include <soc/rockchip/rockchip_sip.h>
 
@@ -381,17 +382,16 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
 	}
 
 	regmap_read(data->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
-	ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
-		    RK3399_PMUGRF_DDRTYPE_MASK;
+	ddr_type = FIELD_GET(RK3399_PMUGRF_OS_REG2_DDRTYPE, val);
 
 	switch (ddr_type) {
-	case RK3399_PMUGRF_DDRTYPE_DDR3:
+	case ROCKCHIP_DDRTYPE_DDR3:
 		data->odt_dis_freq = data->ddr3_odt_dis_freq;
 		break;
-	case RK3399_PMUGRF_DDRTYPE_LPDDR3:
+	case ROCKCHIP_DDRTYPE_LPDDR3:
 		data->odt_dis_freq = data->lpddr3_odt_dis_freq;
 		break;
-	case RK3399_PMUGRF_DDRTYPE_LPDDR4:
+	case ROCKCHIP_DDRTYPE_LPDDR4:
 		data->odt_dis_freq = data->lpddr4_odt_dis_freq;
 		break;
 	default:
diff --git a/include/soc/rockchip/rk3399_grf.h b/include/soc/rockchip/rk3399_grf.h
index 3eebabcb28123..775f8444bea8d 100644
--- a/include/soc/rockchip/rk3399_grf.h
+++ b/include/soc/rockchip/rk3399_grf.h
@@ -11,11 +11,6 @@
 
 /* PMU GRF Registers */
 #define RK3399_PMUGRF_OS_REG2		0x308
-#define RK3399_PMUGRF_DDRTYPE_SHIFT	13
-#define RK3399_PMUGRF_DDRTYPE_MASK	7
-#define RK3399_PMUGRF_DDRTYPE_DDR3	3
-#define RK3399_PMUGRF_DDRTYPE_LPDDR2	5
-#define RK3399_PMUGRF_DDRTYPE_LPDDR3	6
-#define RK3399_PMUGRF_DDRTYPE_LPDDR4	7
+#define RK3399_PMUGRF_OS_REG2_DDRTYPE		GENMASK(15, 13)
 
 #endif
diff --git a/include/soc/rockchip/rockchip_grf.h b/include/soc/rockchip/rockchip_grf.h
new file mode 100644
index 0000000000000..dde1a9796ccb5
--- /dev/null
+++ b/include/soc/rockchip/rockchip_grf.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Rockchip General Register Files definitions
+ */
+
+#ifndef __SOC_ROCKCHIP_GRF_H
+#define __SOC_ROCKCHIP_GRF_H
+
+/* Rockchip DDRTYPE defines */
+enum {
+	ROCKCHIP_DDRTYPE_DDR3	= 3,
+	ROCKCHIP_DDRTYPE_LPDDR2	= 5,
+	ROCKCHIP_DDRTYPE_LPDDR3	= 6,
+	ROCKCHIP_DDRTYPE_LPDDR4	= 7,
+};
+
+#endif /* __SOC_ROCKCHIP_GRF_H */
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-rockchip@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	Heiko Stuebner <heiko@sntech.de>,
	Chanwoo Choi <chanwoo@kernel.org>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	kernel@pengutronix.de,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Robin Murphy <robin.murphy@arm.com>,
	Vincent Legoll <vincent.legoll@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Chanwoo Choi <cw00.choi@samsung.com>
Subject: [PATCH v8 08/26] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines
Date: Wed, 18 Oct 2023 08:16:56 +0200	[thread overview]
Message-ID: <20231018061714.3553817-9-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20231018061714.3553817-1-s.hauer@pengutronix.de>

The DDRTYPE defines are named to be RK3399 specific, but they can be
used for other Rockchip SoCs as well, so replace the RK3399_PMUGRF_
prefix with ROCKCHIP_. They are defined in a SoC specific header
file, so when generalizing the prefix also move the new defines to
a SoC agnostic header file. While at it use GENMASK to define the
DDRTYPE bitfield and give it a name including the full register name.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/devfreq/event/rockchip-dfi.c |  9 +++++----
 drivers/devfreq/rk3399_dmc.c         | 10 +++++-----
 include/soc/rockchip/rk3399_grf.h    |  7 +------
 include/soc/rockchip/rockchip_grf.h  | 17 +++++++++++++++++
 4 files changed, 28 insertions(+), 15 deletions(-)
 create mode 100644 include/soc/rockchip/rockchip_grf.h

diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 28c18bbf6baa5..82d18c60538a5 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -18,8 +18,10 @@
 #include <linux/list.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/bitfield.h>
 #include <linux/bits.h>
 
+#include <soc/rockchip/rockchip_grf.h>
 #include <soc/rockchip/rk3399_grf.h>
 
 #define DMC_MAX_CHANNELS	2
@@ -75,9 +77,9 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
 	writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
 
 	/* set ddr type to dfi */
-	if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
+	if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
 		writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
-	else if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
+	else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
 		writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
 
 	/* enable count, use software mode */
@@ -192,8 +194,7 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
 
 	/* get ddr type */
 	regmap_read(regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
-	dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
-			RK3399_PMUGRF_DDRTYPE_MASK;
+	dfi->ddr_type = FIELD_GET(RK3399_PMUGRF_OS_REG2_DDRTYPE, val);
 
 	dfi->channel_mask = GENMASK(1, 0);
 	dfi->max_channels = 2;
diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
index daff407026157..fd2c5ffedf41e 100644
--- a/drivers/devfreq/rk3399_dmc.c
+++ b/drivers/devfreq/rk3399_dmc.c
@@ -22,6 +22,7 @@
 #include <linux/suspend.h>
 
 #include <soc/rockchip/pm_domains.h>
+#include <soc/rockchip/rockchip_grf.h>
 #include <soc/rockchip/rk3399_grf.h>
 #include <soc/rockchip/rockchip_sip.h>
 
@@ -381,17 +382,16 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
 	}
 
 	regmap_read(data->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
-	ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
-		    RK3399_PMUGRF_DDRTYPE_MASK;
+	ddr_type = FIELD_GET(RK3399_PMUGRF_OS_REG2_DDRTYPE, val);
 
 	switch (ddr_type) {
-	case RK3399_PMUGRF_DDRTYPE_DDR3:
+	case ROCKCHIP_DDRTYPE_DDR3:
 		data->odt_dis_freq = data->ddr3_odt_dis_freq;
 		break;
-	case RK3399_PMUGRF_DDRTYPE_LPDDR3:
+	case ROCKCHIP_DDRTYPE_LPDDR3:
 		data->odt_dis_freq = data->lpddr3_odt_dis_freq;
 		break;
-	case RK3399_PMUGRF_DDRTYPE_LPDDR4:
+	case ROCKCHIP_DDRTYPE_LPDDR4:
 		data->odt_dis_freq = data->lpddr4_odt_dis_freq;
 		break;
 	default:
diff --git a/include/soc/rockchip/rk3399_grf.h b/include/soc/rockchip/rk3399_grf.h
index 3eebabcb28123..775f8444bea8d 100644
--- a/include/soc/rockchip/rk3399_grf.h
+++ b/include/soc/rockchip/rk3399_grf.h
@@ -11,11 +11,6 @@
 
 /* PMU GRF Registers */
 #define RK3399_PMUGRF_OS_REG2		0x308
-#define RK3399_PMUGRF_DDRTYPE_SHIFT	13
-#define RK3399_PMUGRF_DDRTYPE_MASK	7
-#define RK3399_PMUGRF_DDRTYPE_DDR3	3
-#define RK3399_PMUGRF_DDRTYPE_LPDDR2	5
-#define RK3399_PMUGRF_DDRTYPE_LPDDR3	6
-#define RK3399_PMUGRF_DDRTYPE_LPDDR4	7
+#define RK3399_PMUGRF_OS_REG2_DDRTYPE		GENMASK(15, 13)
 
 #endif
diff --git a/include/soc/rockchip/rockchip_grf.h b/include/soc/rockchip/rockchip_grf.h
new file mode 100644
index 0000000000000..dde1a9796ccb5
--- /dev/null
+++ b/include/soc/rockchip/rockchip_grf.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Rockchip General Register Files definitions
+ */
+
+#ifndef __SOC_ROCKCHIP_GRF_H
+#define __SOC_ROCKCHIP_GRF_H
+
+/* Rockchip DDRTYPE defines */
+enum {
+	ROCKCHIP_DDRTYPE_DDR3	= 3,
+	ROCKCHIP_DDRTYPE_LPDDR2	= 5,
+	ROCKCHIP_DDRTYPE_LPDDR3	= 6,
+	ROCKCHIP_DDRTYPE_LPDDR4	= 7,
+};
+
+#endif /* __SOC_ROCKCHIP_GRF_H */
-- 
2.39.2


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-rockchip@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	Heiko Stuebner <heiko@sntech.de>,
	Chanwoo Choi <chanwoo@kernel.org>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	kernel@pengutronix.de,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Robin Murphy <robin.murphy@arm.com>,
	Vincent Legoll <vincent.legoll@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Chanwoo Choi <cw00.choi@samsung.com>
Subject: [PATCH v8 08/26] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines
Date: Wed, 18 Oct 2023 08:16:56 +0200	[thread overview]
Message-ID: <20231018061714.3553817-9-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20231018061714.3553817-1-s.hauer@pengutronix.de>

The DDRTYPE defines are named to be RK3399 specific, but they can be
used for other Rockchip SoCs as well, so replace the RK3399_PMUGRF_
prefix with ROCKCHIP_. They are defined in a SoC specific header
file, so when generalizing the prefix also move the new defines to
a SoC agnostic header file. While at it use GENMASK to define the
DDRTYPE bitfield and give it a name including the full register name.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/devfreq/event/rockchip-dfi.c |  9 +++++----
 drivers/devfreq/rk3399_dmc.c         | 10 +++++-----
 include/soc/rockchip/rk3399_grf.h    |  7 +------
 include/soc/rockchip/rockchip_grf.h  | 17 +++++++++++++++++
 4 files changed, 28 insertions(+), 15 deletions(-)
 create mode 100644 include/soc/rockchip/rockchip_grf.h

diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 28c18bbf6baa5..82d18c60538a5 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -18,8 +18,10 @@
 #include <linux/list.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/bitfield.h>
 #include <linux/bits.h>
 
+#include <soc/rockchip/rockchip_grf.h>
 #include <soc/rockchip/rk3399_grf.h>
 
 #define DMC_MAX_CHANNELS	2
@@ -75,9 +77,9 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
 	writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
 
 	/* set ddr type to dfi */
-	if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
+	if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
 		writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
-	else if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
+	else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
 		writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
 
 	/* enable count, use software mode */
@@ -192,8 +194,7 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
 
 	/* get ddr type */
 	regmap_read(regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
-	dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
-			RK3399_PMUGRF_DDRTYPE_MASK;
+	dfi->ddr_type = FIELD_GET(RK3399_PMUGRF_OS_REG2_DDRTYPE, val);
 
 	dfi->channel_mask = GENMASK(1, 0);
 	dfi->max_channels = 2;
diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
index daff407026157..fd2c5ffedf41e 100644
--- a/drivers/devfreq/rk3399_dmc.c
+++ b/drivers/devfreq/rk3399_dmc.c
@@ -22,6 +22,7 @@
 #include <linux/suspend.h>
 
 #include <soc/rockchip/pm_domains.h>
+#include <soc/rockchip/rockchip_grf.h>
 #include <soc/rockchip/rk3399_grf.h>
 #include <soc/rockchip/rockchip_sip.h>
 
@@ -381,17 +382,16 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev)
 	}
 
 	regmap_read(data->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
-	ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
-		    RK3399_PMUGRF_DDRTYPE_MASK;
+	ddr_type = FIELD_GET(RK3399_PMUGRF_OS_REG2_DDRTYPE, val);
 
 	switch (ddr_type) {
-	case RK3399_PMUGRF_DDRTYPE_DDR3:
+	case ROCKCHIP_DDRTYPE_DDR3:
 		data->odt_dis_freq = data->ddr3_odt_dis_freq;
 		break;
-	case RK3399_PMUGRF_DDRTYPE_LPDDR3:
+	case ROCKCHIP_DDRTYPE_LPDDR3:
 		data->odt_dis_freq = data->lpddr3_odt_dis_freq;
 		break;
-	case RK3399_PMUGRF_DDRTYPE_LPDDR4:
+	case ROCKCHIP_DDRTYPE_LPDDR4:
 		data->odt_dis_freq = data->lpddr4_odt_dis_freq;
 		break;
 	default:
diff --git a/include/soc/rockchip/rk3399_grf.h b/include/soc/rockchip/rk3399_grf.h
index 3eebabcb28123..775f8444bea8d 100644
--- a/include/soc/rockchip/rk3399_grf.h
+++ b/include/soc/rockchip/rk3399_grf.h
@@ -11,11 +11,6 @@
 
 /* PMU GRF Registers */
 #define RK3399_PMUGRF_OS_REG2		0x308
-#define RK3399_PMUGRF_DDRTYPE_SHIFT	13
-#define RK3399_PMUGRF_DDRTYPE_MASK	7
-#define RK3399_PMUGRF_DDRTYPE_DDR3	3
-#define RK3399_PMUGRF_DDRTYPE_LPDDR2	5
-#define RK3399_PMUGRF_DDRTYPE_LPDDR3	6
-#define RK3399_PMUGRF_DDRTYPE_LPDDR4	7
+#define RK3399_PMUGRF_OS_REG2_DDRTYPE		GENMASK(15, 13)
 
 #endif
diff --git a/include/soc/rockchip/rockchip_grf.h b/include/soc/rockchip/rockchip_grf.h
new file mode 100644
index 0000000000000..dde1a9796ccb5
--- /dev/null
+++ b/include/soc/rockchip/rockchip_grf.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Rockchip General Register Files definitions
+ */
+
+#ifndef __SOC_ROCKCHIP_GRF_H
+#define __SOC_ROCKCHIP_GRF_H
+
+/* Rockchip DDRTYPE defines */
+enum {
+	ROCKCHIP_DDRTYPE_DDR3	= 3,
+	ROCKCHIP_DDRTYPE_LPDDR2	= 5,
+	ROCKCHIP_DDRTYPE_LPDDR3	= 6,
+	ROCKCHIP_DDRTYPE_LPDDR4	= 7,
+};
+
+#endif /* __SOC_ROCKCHIP_GRF_H */
-- 
2.39.2


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  parent reply	other threads:[~2023-10-18  6:19 UTC|newest]

Thread overview: 215+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-18  6:16 [PATCH v8 00/26] Add perf support to the rockchip-dfi driver Sascha Hauer
2023-10-18  6:16 ` Sascha Hauer
2023-10-18  6:16 ` Sascha Hauer
2023-10-18  6:16 ` [PATCH v8 01/26] PM / devfreq: rockchip-dfi: Make pmu regmap mandatory Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 14:51   ` Chanwoo Choi
2023-10-18 14:51     ` Chanwoo Choi
2023-10-18 14:51     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 02/26] PM / devfreq: rockchip-dfi: Embed desc into private data struct Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 14:51   ` Chanwoo Choi
2023-10-18 14:51     ` Chanwoo Choi
2023-10-18 14:51     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 03/26] PM / devfreq: rockchip-dfi: use consistent name for " Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 14:58   ` Chanwoo Choi
2023-10-18 14:58     ` Chanwoo Choi
2023-10-18 14:58     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 04/26] PM / devfreq: rockchip-dfi: Add SoC specific init function Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 14:58   ` Chanwoo Choi
2023-10-18 14:58     ` Chanwoo Choi
2023-10-18 14:58     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 05/26] PM / devfreq: rockchip-dfi: dfi store raw values in counter struct Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 15:05   ` Chanwoo Choi
2023-10-18 15:05     ` Chanwoo Choi
2023-10-18 15:05     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 06/26] PM / devfreq: rockchip-dfi: Use free running counter Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-19 11:34   ` 최찬우/Tizen Platform Lab(SR)/삼성전자
2023-10-19 11:34     ` 최찬우/Tizen Platform Lab(SR)/삼성전자
2023-10-19 11:34     ` 최찬우/Tizen Platform Lab(SR)/삼성전자
2023-10-18  6:16 ` [PATCH v8 07/26] PM / devfreq: rockchip-dfi: introduce channel mask Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 15:05   ` Chanwoo Choi
2023-10-18 15:05     ` Chanwoo Choi
2023-10-18 15:05     ` Chanwoo Choi
2023-10-19 11:37     ` Chanwoo Choi
2023-10-19 11:37       ` Chanwoo Choi
2023-10-19 11:37       ` Chanwoo Choi
2023-10-18  6:16 ` Sascha Hauer [this message]
2023-10-18  6:16   ` [PATCH v8 08/26] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  7:08   ` [PATCH v8 08/26] PM / devfreq: rk3399_dmc, dfi: " Sascha Hauer
2023-10-18  7:08     ` Sascha Hauer
2023-10-18  7:08     ` Sascha Hauer
2023-10-18 20:01   ` [PATCH v8 08/26] PM / devfreq: rk3399_dmc,dfi: " Heiko Stübner
2023-10-18 20:01     ` Heiko Stübner
2023-10-18 20:01     ` Heiko Stübner
2023-10-19 11:43   ` Chanwoo Choi
2023-10-19 11:43     ` Chanwoo Choi
2023-10-19 11:43     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 09/26] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-19 11:44   ` Chanwoo Choi
2023-10-19 11:44     ` Chanwoo Choi
2023-10-19 11:44     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 10/26] PM / devfreq: rockchip-dfi: Add RK3568 support Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 15:05   ` Chanwoo Choi
2023-10-18 15:05     ` Chanwoo Choi
2023-10-18 15:05     ` Chanwoo Choi
2023-10-18 20:02   ` Heiko Stübner
2023-10-18 20:02     ` Heiko Stübner
2023-10-18 20:02     ` Heiko Stübner
2023-10-19 11:46   ` Chanwoo Choi
2023-10-19 11:46     ` Chanwoo Choi
2023-10-19 11:46     ` Chanwoo Choi
2023-10-18  6:16 ` [PATCH v8 11/26] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18  6:16   ` Sascha Hauer
2023-10-18 15:06   ` Chanwoo Choi
2023-10-18 15:06     ` Chanwoo Choi
2023-10-18 15:06     ` Chanwoo Choi
2023-10-19 11:51   ` Chanwoo Choi
2023-10-19 11:51     ` Chanwoo Choi
2023-10-19 11:51     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 12/26] PM / devfreq: rockchip-dfi: Handle LPDDR4X Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18 20:02   ` Heiko Stübner
2023-10-18 20:02     ` Heiko Stübner
2023-10-18 20:02     ` Heiko Stübner
2023-10-19 11:52   ` Chanwoo Choi
2023-10-19 11:52     ` Chanwoo Choi
2023-10-19 11:52     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 13/26] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-19 11:55   ` Chanwoo Choi
2023-10-19 11:55     ` Chanwoo Choi
2023-10-19 11:55     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 14/26] PM / devfreq: rockchip-dfi: Prepare for multiple users Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-19 11:58   ` Chanwoo Choi
2023-10-19 11:58     ` Chanwoo Choi
2023-10-19 11:58     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 15/26] PM / devfreq: rockchip-dfi: give variable a better name Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-19 11:59   ` Chanwoo Choi
2023-10-19 11:59     ` Chanwoo Choi
2023-10-19 11:59     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 16/26] PM / devfreq: rockchip-dfi: Add perf support Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  7:58   ` kernel test robot
2023-10-18  7:58     ` kernel test robot
2023-10-18  7:58     ` kernel test robot
2023-10-18 15:11     ` Chanwoo Choi
2023-10-18 15:11       ` Chanwoo Choi
2023-10-18 15:11       ` Chanwoo Choi
2023-10-19  6:52       ` Sascha Hauer
2023-10-19  6:52         ` Sascha Hauer
2023-10-19  6:52         ` Sascha Hauer
2023-10-18 20:03   ` Heiko Stübner
2023-10-18 20:03     ` Heiko Stübner
2023-10-18 20:03     ` Heiko Stübner
2023-10-19  6:48   ` [PATCH] " Sascha Hauer
2023-10-19  6:48     ` Sascha Hauer
2023-10-19  6:48     ` Sascha Hauer
2023-10-19  9:00     ` kernel test robot
2023-10-19  9:00       ` kernel test robot
2023-10-19 12:16     ` Chanwoo Choi
2023-10-19 12:16       ` Chanwoo Choi
2023-10-19 12:16       ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 17/26] PM / devfreq: rockchip-dfi: make register stride SoC specific Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18 15:11   ` Chanwoo Choi
2023-10-18 15:11     ` Chanwoo Choi
2023-10-18 15:11     ` Chanwoo Choi
2023-10-19 12:17     ` Chanwoo Choi
2023-10-19 12:17       ` Chanwoo Choi
2023-10-19 12:17       ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 18/26] PM / devfreq: rockchip-dfi: account for multiple DDRMON_CTRL registers Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18 15:11   ` Chanwoo Choi
2023-10-18 15:11     ` Chanwoo Choi
2023-10-18 15:11     ` Chanwoo Choi
2023-10-19 12:18     ` Chanwoo Choi
2023-10-19 12:18       ` Chanwoo Choi
2023-10-19 12:18       ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 19/26] PM / devfreq: rockchip-dfi: add support for RK3588 Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18 15:12   ` Chanwoo Choi
2023-10-18 15:12     ` Chanwoo Choi
2023-10-18 15:12     ` Chanwoo Choi
2023-10-19 12:21     ` Chanwoo Choi
2023-10-19 12:21       ` Chanwoo Choi
2023-10-19 12:21       ` Chanwoo Choi
2023-10-19 12:34     ` Chanwoo Choi
2023-10-19 12:34       ` Chanwoo Choi
2023-10-19 12:34       ` Chanwoo Choi
2023-10-18 20:03   ` Heiko Stübner
2023-10-18 20:03     ` Heiko Stübner
2023-10-18 20:03     ` Heiko Stübner
2023-10-18  6:17 ` [PATCH v8 20/26] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-19 12:24   ` Chanwoo Choi
2023-10-19 12:24     ` Chanwoo Choi
2023-10-19 12:24     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 21/26] dt-bindings: devfreq: event: rockchip,dfi: Add rk3568 support Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-19 12:27   ` Chanwoo Choi
2023-10-19 12:27     ` Chanwoo Choi
2023-10-19 12:27     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 22/26] dt-bindings: devfreq: event: rockchip,dfi: Add rk3588 support Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-19 12:27   ` Chanwoo Choi
2023-10-19 12:27     ` Chanwoo Choi
2023-10-19 12:27     ` Chanwoo Choi
2023-10-18  6:17 ` [PATCH v8 23/26] dt-bindings: soc: rockchip: grf: add rockchip,rk3588-pmugrf Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17 ` [PATCH v8 24/26] arm64: dts: rockchip: rk3399: Enable DFI Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17 ` [PATCH v8 25/26] arm64: dts: rockchip: rk356x: Add DFI Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17 ` [PATCH v8 26/26] arm64: dts: rockchip: rk3588s: " Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-10-18  6:17   ` Sascha Hauer
2023-11-23  9:38   ` Jagan Teki
2023-11-23  9:38     ` Jagan Teki
2023-11-23  9:38     ` Jagan Teki
2023-10-18 15:21 ` [PATCH v8 00/26] Add perf support to the rockchip-dfi driver Chanwoo Choi
2023-10-18 15:21   ` Chanwoo Choi
2023-10-18 15:21   ` Chanwoo Choi
2023-10-18 20:06   ` Heiko Stübner
2023-10-18 20:06     ` Heiko Stübner
2023-10-18 20:06     ` Heiko Stübner
2023-10-19  8:54 ` (subset) " Heiko Stuebner
2023-10-19  8:54   ` Heiko Stuebner
2023-10-19  8:54   ` Heiko Stuebner
2023-10-19 14:05 ` Heiko Stuebner
2023-10-19 14:05   ` Heiko Stuebner
2023-10-19 14:05   ` Heiko Stuebner

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