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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
	"Tom Joseph" <tjoseph@cadence.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	linux-kernel@vger.kernel.org
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH 1/7] PCI: cadence: Use FIELD_GET()
Date: Wed, 18 Oct 2023 14:32:48 +0300	[thread overview]
Message-ID: <20231018113254.17616-2-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20231018113254.17616-1-ilpo.jarvinen@linux.intel.com>

Convert open-coded variants of PCI field access into FIELD_GET() to
make the code easier to understand.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 drivers/pci/controller/cadence/pcie-cadence-ep.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c
index b8b655d4047e..3142feb8ac19 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-ep.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c
@@ -3,6 +3,7 @@
 // Cadence PCIe endpoint controller driver.
 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
 
+#include <linux/bitfield.h>
 #include <linux/delay.h>
 #include <linux/kernel.h>
 #include <linux/of.h>
@@ -262,7 +263,7 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn)
 	 * Get the Multiple Message Enable bitfield from the Message Control
 	 * register.
 	 */
-	mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;
+	mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);
 
 	return mme;
 }
@@ -394,7 +395,7 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,
 		return -EINVAL;
 
 	/* Get the number of enabled MSIs */
-	mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;
+	mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);
 	msi_count = 1 << mme;
 	if (!interrupt_num || interrupt_num > msi_count)
 		return -EINVAL;
@@ -449,7 +450,7 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, u8 vfn,
 		return -EINVAL;
 
 	/* Get the number of enabled MSIs */
-	mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;
+	mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);
 	msi_count = 1 << mme;
 	if (!interrupt_num || interrupt_num > msi_count)
 		return -EINVAL;
@@ -506,7 +507,7 @@ static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,
 
 	reg = cap + PCI_MSIX_TABLE;
 	tbl_offset = cdns_pcie_ep_fn_readl(pcie, fn, reg);
-	bir = tbl_offset & PCI_MSIX_TABLE_BIR;
+	bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset);
 	tbl_offset &= PCI_MSIX_TABLE_OFFSET;
 
 	msix_tbl = epf->epf_bar[bir]->addr + tbl_offset;
-- 
2.30.2


  reply	other threads:[~2023-10-18 11:33 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-18 11:32 [PATCH 0/7] PCI: Use FIELD_GET/PREP() & other reg field cleanups Ilpo Järvinen
2023-10-18 11:32 ` Ilpo Järvinen [this message]
2023-10-18 11:32 ` [PATCH 2/7] PCI: dwc: Use FIELD_GET/PREP() Ilpo Järvinen
2023-10-18 11:58   ` Serge Semin
2023-10-18 14:16     ` Ilpo Järvinen
2023-10-18 11:32 ` [PATCH 3/7] PCI: hotplug: " Ilpo Järvinen
2023-10-18 11:32 ` [PATCH 4/7] PCI/DPC: Use FIELD_GET() Ilpo Järvinen
2023-10-18 11:32 ` [PATCH 5/7] PCI/DPC: Use defined fields with DPC_CTL register Ilpo Järvinen
2023-10-18 11:32 ` [PATCH 6/7] PCI/DPC: Use defines with DPC reason fields Ilpo Järvinen
2023-10-18 11:32 ` [PATCH 7/7] PCI/MSI: Use FIELD_GET/PREP() Ilpo Järvinen
2023-10-18 16:23 ` [PATCH 0/7] PCI: Use FIELD_GET/PREP() & other reg field cleanups Bjorn Helgaas

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