From: Georgi Djakov <quic_c_gdjako@quicinc.com> To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org> Cc: <devicetree@vger.kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <quic_cgoldswo@quicinc.com>, <quic_sukadev@quicinc.com>, <quic_pdaly@quicinc.com>, <quic_sudaraja@quicinc.com>, <djakov@kernel.org> Subject: [PATCH v2 0/6] Add support for Translation Buffer Units Date: Fri, 17 Nov 2023 20:27:24 -0800 [thread overview] Message-ID: <20231118042730.2799-1-quic_c_gdjako@quicinc.com> (raw) The TCUs (Translation Control Units) and TBUs (Translation Buffer Units) are key components of the MMU-500. Multiple TBUs are connected to a single TCU over an interconnect. Each TBU contains a TLB that caches page tables. The MMU-500 implements a TBU for each connected master, and the TBU is designed, so that it is local to the master. The Qualcomm SDM845 platform has an implementation of the SMMU-500, that has multiple TBUs. A DT schema is added to describe the resources for each TBU (register space, power-domains, interconnects and clocks). The TBU driver will manage the resources and allow the system to operate the TBUs during a context fault to obtain details by doing s1 inv, software + hardware page table walks etc. This is implemented with ATOS/eCATs as the ATS feature is not supported. Being able to query the TBUs is useful for debugging various hardware/software issues on these platforms. v2: - Improve DT binding description, add full example. (Konrad) - Drop Qcom specific stuff from the generic binding. (Rob) - Unconditionally try to populate subnodes. (Konrad) - Improve TBU driver commit text, remove memory barriers. (Bjorn) - Move TBU stuff into separate file. Make the driver builtin. - TODO: Evaluate whether to keep TBU support as a separate driver or just instantiate things from qcom_smmu_impl_init() v1: https://lore.kernel.org/r/20231019021923.13939-1-quic_c_gdjako@quicinc.com Georgi Djakov (6): dt-bindings: iommu: Add Translation Buffer Unit bindings iommu/arm-smmu-qcom: Add support for TBUs iommu/arm-smmu-qcom: Add Qualcomm TBU driver iommu/arm-smmu: Allow using a threaded handler for context interrupts iommu/arm-smmu-qcom: Use a custom context fault handler for sdm845 arm64: dts: qcom: sdm845: Add DT nodes for the TBUs .../devicetree/bindings/iommu/arm,smmu.yaml | 25 + .../bindings/iommu/qcom,qsmmuv500-tbu.yaml | 89 ++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 82 +++ drivers/iommu/Kconfig | 8 + drivers/iommu/arm/arm-smmu/Makefile | 1 + .../iommu/arm/arm-smmu/arm-smmu-qcom-tbu.c | 504 ++++++++++++++++++ drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 12 + drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h | 6 +- drivers/iommu/arm/arm-smmu/arm-smmu.c | 12 +- drivers/iommu/arm/arm-smmu/arm-smmu.h | 3 + 10 files changed, 739 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/iommu/qcom,qsmmuv500-tbu.yaml create mode 100644 drivers/iommu/arm/arm-smmu/arm-smmu-qcom-tbu.c
WARNING: multiple messages have this Message-ID (diff)
From: Georgi Djakov <quic_c_gdjako@quicinc.com> To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org> Cc: <devicetree@vger.kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <quic_cgoldswo@quicinc.com>, <quic_sukadev@quicinc.com>, <quic_pdaly@quicinc.com>, <quic_sudaraja@quicinc.com>, <djakov@kernel.org> Subject: [PATCH v2 0/6] Add support for Translation Buffer Units Date: Fri, 17 Nov 2023 20:27:24 -0800 [thread overview] Message-ID: <20231118042730.2799-1-quic_c_gdjako@quicinc.com> (raw) The TCUs (Translation Control Units) and TBUs (Translation Buffer Units) are key components of the MMU-500. Multiple TBUs are connected to a single TCU over an interconnect. Each TBU contains a TLB that caches page tables. The MMU-500 implements a TBU for each connected master, and the TBU is designed, so that it is local to the master. The Qualcomm SDM845 platform has an implementation of the SMMU-500, that has multiple TBUs. A DT schema is added to describe the resources for each TBU (register space, power-domains, interconnects and clocks). The TBU driver will manage the resources and allow the system to operate the TBUs during a context fault to obtain details by doing s1 inv, software + hardware page table walks etc. This is implemented with ATOS/eCATs as the ATS feature is not supported. Being able to query the TBUs is useful for debugging various hardware/software issues on these platforms. v2: - Improve DT binding description, add full example. (Konrad) - Drop Qcom specific stuff from the generic binding. (Rob) - Unconditionally try to populate subnodes. (Konrad) - Improve TBU driver commit text, remove memory barriers. (Bjorn) - Move TBU stuff into separate file. Make the driver builtin. - TODO: Evaluate whether to keep TBU support as a separate driver or just instantiate things from qcom_smmu_impl_init() v1: https://lore.kernel.org/r/20231019021923.13939-1-quic_c_gdjako@quicinc.com Georgi Djakov (6): dt-bindings: iommu: Add Translation Buffer Unit bindings iommu/arm-smmu-qcom: Add support for TBUs iommu/arm-smmu-qcom: Add Qualcomm TBU driver iommu/arm-smmu: Allow using a threaded handler for context interrupts iommu/arm-smmu-qcom: Use a custom context fault handler for sdm845 arm64: dts: qcom: sdm845: Add DT nodes for the TBUs .../devicetree/bindings/iommu/arm,smmu.yaml | 25 + .../bindings/iommu/qcom,qsmmuv500-tbu.yaml | 89 ++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 82 +++ drivers/iommu/Kconfig | 8 + drivers/iommu/arm/arm-smmu/Makefile | 1 + .../iommu/arm/arm-smmu/arm-smmu-qcom-tbu.c | 504 ++++++++++++++++++ drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 12 + drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h | 6 +- drivers/iommu/arm/arm-smmu/arm-smmu.c | 12 +- drivers/iommu/arm/arm-smmu/arm-smmu.h | 3 + 10 files changed, 739 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/iommu/qcom,qsmmuv500-tbu.yaml create mode 100644 drivers/iommu/arm/arm-smmu/arm-smmu-qcom-tbu.c _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2023-11-18 4:28 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-11-18 4:27 Georgi Djakov [this message] 2023-11-18 4:27 ` [PATCH v2 0/6] Add support for Translation Buffer Units Georgi Djakov 2023-11-18 4:27 ` [PATCH v2 1/6] dt-bindings: iommu: Add Translation Buffer Unit bindings Georgi Djakov 2023-11-18 4:27 ` Georgi Djakov 2023-11-20 15:36 ` Andrew Halaney 2023-11-20 15:36 ` Andrew Halaney 2023-11-27 18:13 ` Rob Herring 2023-11-27 18:13 ` Rob Herring 2023-11-30 23:24 ` Georgi Djakov 2023-11-30 23:24 ` Georgi Djakov 2023-11-18 4:27 ` [PATCH v2 2/6] iommu/arm-smmu-qcom: Add support for TBUs Georgi Djakov 2023-11-18 4:27 ` Georgi Djakov 2023-11-18 4:27 ` [PATCH v2 3/6] iommu/arm-smmu-qcom: Add Qualcomm TBU driver Georgi Djakov 2023-11-18 4:27 ` Georgi Djakov 2023-11-18 4:27 ` [PATCH v2 4/6] iommu/arm-smmu: Allow using a threaded handler for context interrupts Georgi Djakov 2023-11-18 4:27 ` Georgi Djakov 2023-11-18 4:27 ` [PATCH v2 5/6] iommu/arm-smmu-qcom: Use a custom context fault handler for sdm845 Georgi Djakov 2023-11-18 4:27 ` Georgi Djakov 2023-11-18 4:27 ` [PATCH v2 6/6] arm64: dts: qcom: sdm845: Add DT nodes for the TBUs Georgi Djakov 2023-11-18 4:27 ` Georgi Djakov 2023-11-18 11:21 ` [PATCH v2 0/6] Add support for Translation Buffer Units Bryan O'Donoghue 2023-11-18 11:21 ` Bryan O'Donoghue 2023-11-30 15:19 ` Georgi Djakov 2023-11-30 15:19 ` Georgi Djakov
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