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From: Yang Yingliang <yangyingliang@huawei.com>
To: <linux-spi@vger.kernel.org>
Cc: <broonie@kernel.org>, <william.qiu@starfivetech.com>,
	<hal.feng@starfivetech.com>, <yangyingliang@huawei.com>
Subject: [PATCH] spi: cadence-quadspi: add missing clk_disable_unprepare() in cqspi_probe()
Date: Wed, 29 Nov 2023 16:11:47 +0800	[thread overview]
Message-ID: <20231129081147.628004-1-yangyingliang@huawei.com> (raw)

cqspi_jh7110_clk_init() is called after clk_prepare_enable(cqspi->clk),
if it fails, it should goto label 'probe_reset_failed' to disable
cqspi->clk.

In the error path after calling cqspi_jh7110_clk_init(),
cqspi_jh7110_disable_clk() need be called.

Fixes: 33f1ef6d4eb6 ("spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
 drivers/spi/spi-cadence-quadspi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 3d7bf62da11c..f94e0d370d46 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1840,7 +1840,7 @@ static int cqspi_probe(struct platform_device *pdev)
 		if (ddata->jh7110_clk_init) {
 			ret = cqspi_jh7110_clk_init(pdev, cqspi);
 			if (ret)
-				goto probe_clk_failed;
+				goto probe_reset_failed;
 		}
 
 		if (of_device_is_compatible(pdev->dev.of_node,
@@ -1901,6 +1901,8 @@ static int cqspi_probe(struct platform_device *pdev)
 probe_setup_failed:
 	cqspi_controller_enable(cqspi, 0);
 probe_reset_failed:
+	if (cqspi->is_jh7110)
+		cqspi_jh7110_disable_clk(pdev, cqspi);
 	clk_disable_unprepare(cqspi->clk);
 probe_clk_failed:
 	return ret;
-- 
2.25.1


             reply	other threads:[~2023-11-29  8:07 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-29  8:11 Yang Yingliang [this message]
2023-12-04 15:47 ` [PATCH] spi: cadence-quadspi: add missing clk_disable_unprepare() in cqspi_probe() Mark Brown

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