All of lore.kernel.org
 help / color / mirror / Atom feed
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: linux-sound@vger.kernel.org
Cc: tiwai@suse.de, broonie@kernel.org,
	"Pierre-Louis Bossart" <pierre-louis.bossart@linux.intel.com>,
	"Péter Ujfalusi" <peter.ujfalusi@linux.intel.com>,
	"Kai Vehmanen" <kai.vehmanen@linux.intel.com>
Subject: [PATCH 1/5] PCI: add INTEL_HDA_ARL to pci_ids.h
Date: Mon,  4 Dec 2023 15:27:06 -0600	[thread overview]
Message-ID: <20231204212710.185976-2-pierre-louis.bossart@linux.intel.com> (raw)
In-Reply-To: <20231204212710.185976-1-pierre-louis.bossart@linux.intel.com>

The PCI ID insertion follows the increasing order in the table, but
this hardware follows MTL (MeteorLake).

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
---
 include/linux/pci_ids.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 275799b5f535..97cc0baad0f4 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -3065,6 +3065,7 @@
 #define PCI_DEVICE_ID_INTEL_82443GX_0	0x71a0
 #define PCI_DEVICE_ID_INTEL_82443GX_2	0x71a2
 #define PCI_DEVICE_ID_INTEL_82372FB_1	0x7601
+#define PCI_DEVICE_ID_INTEL_HDA_ARL	0x7728
 #define PCI_DEVICE_ID_INTEL_HDA_RPL_S	0x7a50
 #define PCI_DEVICE_ID_INTEL_HDA_ADL_S	0x7ad0
 #define PCI_DEVICE_ID_INTEL_HDA_MTL	0x7e28
-- 
2.39.2


  reply	other threads:[~2023-12-04 21:27 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-04 21:27 [PATCH 0/5] PCI/ALSA/ASoC: Add IDs and definitions for ARL and ARL-S Pierre-Louis Bossart
2023-12-04 21:27 ` Pierre-Louis Bossart [this message]
2023-12-04 21:27 ` [PATCH 2/5] ALSA: hda: Intel: add HDA_ARL PCI ID support Pierre-Louis Bossart
2023-12-04 21:27 ` [PATCH 3/5] ALSA: hda: intel-dspcfg: add filters for ARL-S and ARL Pierre-Louis Bossart
2023-12-04 21:27 ` [PATCH 4/5] ASoC: SOF: Intel: pci-mtl: fix ARL-S definitions Pierre-Louis Bossart
2023-12-04 21:27 ` [PATCH 5/5] ASoC: SOF: Intel: pci-mtl: add HDA_ARL PCI support Pierre-Louis Bossart
2023-12-04 21:39 ` [PATCH 0/5] PCI/ALSA/ASoC: Add IDs and definitions for ARL and ARL-S Mark Brown
2023-12-07  8:31 ` Takashi Iwai

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231204212710.185976-2-pierre-louis.bossart@linux.intel.com \
    --to=pierre-louis.bossart@linux.intel.com \
    --cc=broonie@kernel.org \
    --cc=kai.vehmanen@linux.intel.com \
    --cc=linux-sound@vger.kernel.org \
    --cc=peter.ujfalusi@linux.intel.com \
    --cc=tiwai@suse.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.