From: Frank Li <Frank.Li@nxp.com> To: imx@lists.linux.dev, "Richard Zhu" <hongxing.zhu@nxp.com>, "Lucas Stach" <l.stach@pengutronix.de>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Rob Herring" <robh@kernel.org>, "Bjorn Helgaas" <bhelgaas@google.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Conor Dooley" <conor+dt@kernel.org>, "Shawn Guo" <shawnguo@kernel.org>, "Sascha Hauer" <s.hauer@pengutronix.de>, "Pengutronix Kernel Team" <kernel@pengutronix.de>, "Fabio Estevam" <festevam@gmail.com>, "NXP Linux Team" <linux-imx@nxp.com>, linux-pci@vger.kernel.org (open list:PCI DRIVER FOR IMX6), linux-arm-kernel@lists.infradead.org (moderated list:PCI DRIVER FOR IMX6), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 6/9] PCI: imx6: Simplify configure_type() by using mode_off and mode_mask Date: Wed, 6 Dec 2023 10:59:00 -0500 [thread overview] Message-ID: <20231206155903.566194-7-Frank.Li@nxp.com> (raw) In-Reply-To: <20231206155903.566194-1-Frank.Li@nxp.com> Add drvdata::mode_off and drvdata::mode_mask to simple imx6_pcie_configure_type() logic. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 60 ++++++++++++++++++--------- 1 file changed, 40 insertions(+), 20 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 334e714a7e96..a2a3496fe8a0 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -69,6 +69,7 @@ enum imx6_pcie_variants { #define imx6_check_flag(pci, val) (pci->drvdata->flags & val) +#define IMX6_PCIE_MAX_INSTANCES 2 struct imx6_pcie_drvdata { enum imx6_pcie_variants variant; enum dw_pcie_device_mode mode; @@ -77,6 +78,8 @@ struct imx6_pcie_drvdata { const char *gpr; const u32 ltssm_off; const u32 ltssm_mask; + const u32 mode_off[IMX6_PCIE_MAX_INSTANCES]; + const u32 mode_mask[IMX6_PCIE_MAX_INSTANCES]; }; struct imx6_pcie { @@ -177,32 +180,25 @@ static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) { - unsigned int mask, val, mode; + const struct imx6_pcie_drvdata *drvdata = imx6_pcie->drvdata; + unsigned int mask, val, mode, id; - if (imx6_pcie->drvdata->mode == DW_PCIE_EP_TYPE) + if (drvdata->mode == DW_PCIE_EP_TYPE) mode = PCI_EXP_TYPE_ENDPOINT; else mode = PCI_EXP_TYPE_ROOT_PORT; - switch (imx6_pcie->drvdata->variant) { - case IMX8MQ: - case IMX8MQ_EP: - if (imx6_pcie->controller_id == 1) { - mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; - val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, - mode); - } else { - mask = IMX6Q_GPR12_DEVICE_TYPE; - val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); - } - break; - default: - mask = IMX6Q_GPR12_DEVICE_TYPE; - val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); - break; - } + id = imx6_pcie->controller_id; + + /* If mode_mask[id] is zero, means each controller have its individual gpr */ + if (!drvdata->mode_mask[id]) + id = 0; + + mask = drvdata->mode_mask[id]; + /* FIELD_PREP mask have been constant */ + val = mode << __bf_shf(mask); - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); + regmap_update_bits(imx6_pcie->iomuxc_gpr, drvdata->mode_off[id], mask, val); } static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val) @@ -1442,6 +1438,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { .gpr = "fsl,imx6q-iomuxc-gpr", .ltssm_off = IOMUXC_GPR12, .ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2, + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX6SX] = { .variant = IMX6SX, @@ -1452,6 +1450,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { .gpr = "fsl,imx6q-iomuxc-gpr", .ltssm_off = IOMUXC_GPR12, .ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2, + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX6QP] = { .variant = IMX6QP, @@ -1462,6 +1462,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { .gpr = "fsl,imx6q-iomuxc-gpr", .ltssm_off = IOMUXC_GPR12, .ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2, + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX7D] = { .variant = IMX7D, @@ -1469,6 +1471,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_APP_RESET | IMX6_PCIE_FLAG_HAS_PHY_RESET, .gpr = "fsl,imx7d-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MQ] = { .variant = IMX8MQ, @@ -1476,6 +1480,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_APP_RESET | IMX6_PCIE_FLAG_HAS_PHY_RESET, .gpr = "fsl,imx8mq-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, + .mode_off[1] = IOMUXC_GPR12, + .mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, }, [IMX8MM] = { .variant = IMX8MM, @@ -1484,6 +1492,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY | IMX6_PCIE_FLAG_HAS_APP_RESET, .gpr = "fsl,imx8mm-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MP] = { .variant = IMX8MP, @@ -1492,6 +1502,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY | IMX6_PCIE_FLAG_HAS_APP_RESET, .gpr = "fsl,imx8mp-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MQ_EP] = { .variant = IMX8MQ_EP, @@ -1500,6 +1512,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY_RESET, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mq-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, + .mode_off[1] = IOMUXC_GPR12, + .mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, }, [IMX8MM_EP] = { .variant = IMX8MM_EP, @@ -1507,12 +1523,16 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mm-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MP_EP] = { .variant = IMX8MP_EP, .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mp-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, }; -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Frank Li <Frank.Li@nxp.com> To: imx@lists.linux.dev, "Richard Zhu" <hongxing.zhu@nxp.com>, "Lucas Stach" <l.stach@pengutronix.de>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Rob Herring" <robh@kernel.org>, "Bjorn Helgaas" <bhelgaas@google.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Conor Dooley" <conor+dt@kernel.org>, "Shawn Guo" <shawnguo@kernel.org>, "Sascha Hauer" <s.hauer@pengutronix.de>, "Pengutronix Kernel Team" <kernel@pengutronix.de>, "Fabio Estevam" <festevam@gmail.com>, "NXP Linux Team" <linux-imx@nxp.com>, linux-pci@vger.kernel.org (open list:PCI DRIVER FOR IMX6), linux-arm-kernel@lists.infradead.org (moderated list:PCI DRIVER FOR IMX6), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 6/9] PCI: imx6: Simplify configure_type() by using mode_off and mode_mask Date: Wed, 6 Dec 2023 10:59:00 -0500 [thread overview] Message-ID: <20231206155903.566194-7-Frank.Li@nxp.com> (raw) In-Reply-To: <20231206155903.566194-1-Frank.Li@nxp.com> Add drvdata::mode_off and drvdata::mode_mask to simple imx6_pcie_configure_type() logic. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 60 ++++++++++++++++++--------- 1 file changed, 40 insertions(+), 20 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 334e714a7e96..a2a3496fe8a0 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -69,6 +69,7 @@ enum imx6_pcie_variants { #define imx6_check_flag(pci, val) (pci->drvdata->flags & val) +#define IMX6_PCIE_MAX_INSTANCES 2 struct imx6_pcie_drvdata { enum imx6_pcie_variants variant; enum dw_pcie_device_mode mode; @@ -77,6 +78,8 @@ struct imx6_pcie_drvdata { const char *gpr; const u32 ltssm_off; const u32 ltssm_mask; + const u32 mode_off[IMX6_PCIE_MAX_INSTANCES]; + const u32 mode_mask[IMX6_PCIE_MAX_INSTANCES]; }; struct imx6_pcie { @@ -177,32 +180,25 @@ static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) { - unsigned int mask, val, mode; + const struct imx6_pcie_drvdata *drvdata = imx6_pcie->drvdata; + unsigned int mask, val, mode, id; - if (imx6_pcie->drvdata->mode == DW_PCIE_EP_TYPE) + if (drvdata->mode == DW_PCIE_EP_TYPE) mode = PCI_EXP_TYPE_ENDPOINT; else mode = PCI_EXP_TYPE_ROOT_PORT; - switch (imx6_pcie->drvdata->variant) { - case IMX8MQ: - case IMX8MQ_EP: - if (imx6_pcie->controller_id == 1) { - mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; - val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, - mode); - } else { - mask = IMX6Q_GPR12_DEVICE_TYPE; - val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); - } - break; - default: - mask = IMX6Q_GPR12_DEVICE_TYPE; - val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); - break; - } + id = imx6_pcie->controller_id; + + /* If mode_mask[id] is zero, means each controller have its individual gpr */ + if (!drvdata->mode_mask[id]) + id = 0; + + mask = drvdata->mode_mask[id]; + /* FIELD_PREP mask have been constant */ + val = mode << __bf_shf(mask); - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); + regmap_update_bits(imx6_pcie->iomuxc_gpr, drvdata->mode_off[id], mask, val); } static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val) @@ -1442,6 +1438,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { .gpr = "fsl,imx6q-iomuxc-gpr", .ltssm_off = IOMUXC_GPR12, .ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2, + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX6SX] = { .variant = IMX6SX, @@ -1452,6 +1450,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { .gpr = "fsl,imx6q-iomuxc-gpr", .ltssm_off = IOMUXC_GPR12, .ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2, + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX6QP] = { .variant = IMX6QP, @@ -1462,6 +1462,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { .gpr = "fsl,imx6q-iomuxc-gpr", .ltssm_off = IOMUXC_GPR12, .ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2, + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX7D] = { .variant = IMX7D, @@ -1469,6 +1471,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_APP_RESET | IMX6_PCIE_FLAG_HAS_PHY_RESET, .gpr = "fsl,imx7d-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MQ] = { .variant = IMX8MQ, @@ -1476,6 +1480,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_APP_RESET | IMX6_PCIE_FLAG_HAS_PHY_RESET, .gpr = "fsl,imx8mq-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, + .mode_off[1] = IOMUXC_GPR12, + .mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, }, [IMX8MM] = { .variant = IMX8MM, @@ -1484,6 +1492,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY | IMX6_PCIE_FLAG_HAS_APP_RESET, .gpr = "fsl,imx8mm-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MP] = { .variant = IMX8MP, @@ -1492,6 +1502,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY | IMX6_PCIE_FLAG_HAS_APP_RESET, .gpr = "fsl,imx8mp-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MQ_EP] = { .variant = IMX8MQ_EP, @@ -1500,6 +1512,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY_RESET, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mq-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, + .mode_off[1] = IOMUXC_GPR12, + .mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, }, [IMX8MM_EP] = { .variant = IMX8MM_EP, @@ -1507,12 +1523,16 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_HAS_PHY, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mm-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, [IMX8MP_EP] = { .variant = IMX8MP_EP, .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mp-iomuxc-gpr", + .mode_off[0] = IOMUXC_GPR12, + .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, }, }; -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-12-06 15:59 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-12-06 15:58 [PATCH 0/9] PCI: imx6: Clean up and add imx95 pci support Frank Li 2023-12-06 15:58 ` Frank Li 2023-12-06 15:58 ` [PATCH 1/9] PCI: imx6: Simplify clock handling by using HAS_CLK_* bitmask Frank Li 2023-12-06 15:58 ` Frank Li 2023-12-06 15:58 ` [PATCH 2/9] PCI: imx6: Simplify phy handling by using by using IMX6_PCIE_FLAG_HAS_PHY Frank Li 2023-12-06 15:58 ` Frank Li 2023-12-06 15:58 ` [PATCH 3/9] PCI: imx6: Simplify reset handling by using by using *_FLAG_HAS_*_RESET Frank Li 2023-12-06 15:58 ` Frank Li 2023-12-06 16:52 ` Philipp Zabel 2023-12-06 16:52 ` Philipp Zabel 2023-12-07 17:10 ` Frank Li 2023-12-07 17:10 ` Frank Li 2023-12-08 11:49 ` Philipp Zabel 2023-12-08 11:49 ` Philipp Zabel 2023-12-06 15:58 ` [PATCH 4/9] PCI: imx6: Using "linux,pci-domain" as slot ID Frank Li 2023-12-06 15:58 ` Frank Li 2023-12-06 16:36 ` Bjorn Helgaas 2023-12-06 16:36 ` Bjorn Helgaas 2023-12-06 16:50 ` Frank Li 2023-12-06 16:50 ` Frank Li 2023-12-06 16:59 ` Bjorn Helgaas 2023-12-06 16:59 ` Bjorn Helgaas 2023-12-06 17:07 ` Frank Li 2023-12-06 17:07 ` Frank Li 2023-12-06 15:58 ` [PATCH 5/9] PCI: imx6: Simplify ltssm_enable() by using ltssm_off and ltssm_mask Frank Li 2023-12-06 15:58 ` Frank Li 2023-12-06 15:59 ` Frank Li [this message] 2023-12-06 15:59 ` [PATCH 6/9] PCI: imx6: Simplify configure_type() by using mode_off and mode_mask Frank Li 2023-12-07 10:38 ` kernel test robot 2023-12-07 10:38 ` kernel test robot 2023-12-06 15:59 ` [PATCH 7/9] PCI: imx6: Simplify switch-case logic by involve init_phy callback Frank Li 2023-12-06 15:59 ` Frank Li 2023-12-07 9:35 ` kernel test robot 2023-12-07 9:35 ` kernel test robot 2023-12-06 15:59 ` [PATCH 8/9] dt-bindings: imx6q-pcie: Add imx95 pcie compatible string Frank Li 2023-12-06 15:59 ` Frank Li 2023-12-07 8:30 ` Krzysztof Kozlowski 2023-12-07 8:30 ` Krzysztof Kozlowski 2023-12-06 15:59 ` [PATCH 9/9] PCI: imx6: Add iMX95 PCIe support Frank Li 2023-12-06 15:59 ` Frank Li
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