From: Rob Clark <robdclark@gmail.com> To: iommu@lists.linux-foundation.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>, Johan Hovold <johan@kernel.org>, Rob Clark <robdclark@chromium.org>, stable@vger.kernel.org, Will Deacon <will@kernel.org>, Joerg Roedel <joro@8bytes.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Bjorn Andersson <quic_bjorande@quicinc.com>, Manivannan Sadhasivam <mani@kernel.org>, Danila Tikhonov <danila@jiaxyga.com>, Elliot Berman <quic_eberman@quicinc.com>, linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVERS), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2] iommu/arm-smmu-qcom: Add missing GMU entry to match table Date: Sun, 10 Dec 2023 10:06:53 -0800 [thread overview] Message-ID: <20231210180655.75542-1-robdclark@gmail.com> (raw) From: Rob Clark <robdclark@chromium.org> In some cases the firmware expects cbndx 1 to be assigned to the GMU, so we also want the default domain for the GMU to be an identy domain. This way it does not get a context bank assigned. Without this, both of_dma_configure() and drm/msm's iommu_domain_attach() will trigger allocating and configuring a context bank. So GMU ends up attached to both cbndx 1 and later cbndx 2. This arrangement seemingly confounds and surprises the firmware if the GPU later triggers a translation fault, resulting (on sc8280xp / lenovo x13s, at least) in the SMMU getting wedged and the GPU stuck without memory access. Cc: stable@vger.kernel.org Signed-off-by: Rob Clark <robdclark@chromium.org> --- I didn't add a fixes tag because really this issue has been there all along, but either didn't matter with other firmware or we didn't notice the problem. drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 549ae4dba3a6..d326fa230b96 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -243,6 +243,7 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain, static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { { .compatible = "qcom,adreno" }, + { .compatible = "qcom,adreno-gmu" }, { .compatible = "qcom,mdp4" }, { .compatible = "qcom,mdss" }, { .compatible = "qcom,sc7180-mdss" }, -- 2.43.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Rob Clark <robdclark@gmail.com> To: iommu@lists.linux-foundation.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>, Johan Hovold <johan@kernel.org>, Rob Clark <robdclark@chromium.org>, stable@vger.kernel.org, Will Deacon <will@kernel.org>, Joerg Roedel <joro@8bytes.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Bjorn Andersson <quic_bjorande@quicinc.com>, Manivannan Sadhasivam <mani@kernel.org>, Danila Tikhonov <danila@jiaxyga.com>, Elliot Berman <quic_eberman@quicinc.com>, linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVERS), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2] iommu/arm-smmu-qcom: Add missing GMU entry to match table Date: Sun, 10 Dec 2023 10:06:53 -0800 [thread overview] Message-ID: <20231210180655.75542-1-robdclark@gmail.com> (raw) From: Rob Clark <robdclark@chromium.org> In some cases the firmware expects cbndx 1 to be assigned to the GMU, so we also want the default domain for the GMU to be an identy domain. This way it does not get a context bank assigned. Without this, both of_dma_configure() and drm/msm's iommu_domain_attach() will trigger allocating and configuring a context bank. So GMU ends up attached to both cbndx 1 and later cbndx 2. This arrangement seemingly confounds and surprises the firmware if the GPU later triggers a translation fault, resulting (on sc8280xp / lenovo x13s, at least) in the SMMU getting wedged and the GPU stuck without memory access. Cc: stable@vger.kernel.org Signed-off-by: Rob Clark <robdclark@chromium.org> --- I didn't add a fixes tag because really this issue has been there all along, but either didn't matter with other firmware or we didn't notice the problem. drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 549ae4dba3a6..d326fa230b96 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -243,6 +243,7 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain, static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { { .compatible = "qcom,adreno" }, + { .compatible = "qcom,adreno-gmu" }, { .compatible = "qcom,mdp4" }, { .compatible = "qcom,mdss" }, { .compatible = "qcom,sc7180-mdss" }, -- 2.43.0
next reply other threads:[~2023-12-10 18:07 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-12-10 18:06 Rob Clark [this message] 2023-12-10 18:06 ` [PATCH v2] iommu/arm-smmu-qcom: Add missing GMU entry to match table Rob Clark 2023-12-11 10:11 ` Johan Hovold 2023-12-11 10:11 ` Johan Hovold 2023-12-11 22:58 ` Robin Murphy 2023-12-11 22:58 ` Robin Murphy 2023-12-12 17:21 ` Will Deacon 2023-12-12 17:21 ` Will Deacon
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