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From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
	virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu,
	guoren@kernel.org, conor.dooley@microchip.com
Subject: [PATCH v4 10/13] RISC-V: KVM: selftests: Move sbi_ecall to processor.c
Date: Wed, 20 Dec 2023 17:00:23 +0100	[thread overview]
Message-ID: <20231220160012.40184-25-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231220160012.40184-15-ajones@ventanamicro.com>

sbi_ecall() isn't ucall specific and its prototype is already in
processor.h. Move its implementation to processor.c.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 .../selftests/kvm/lib/riscv/processor.c       | 26 +++++++++++++++++++
 tools/testing/selftests/kvm/lib/riscv/ucall.c | 26 -------------------
 2 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c
index 6c25f7843ef4..6905a4348380 100644
--- a/tools/testing/selftests/kvm/lib/riscv/processor.c
+++ b/tools/testing/selftests/kvm/lib/riscv/processor.c
@@ -367,3 +367,29 @@ void vcpu_args_set(struct kvm_vcpu *vcpu, unsigned int num, ...)
 void assert_on_unhandled_exception(struct kvm_vcpu *vcpu)
 {
 }
+
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+			unsigned long arg1, unsigned long arg2,
+			unsigned long arg3, unsigned long arg4,
+			unsigned long arg5)
+{
+	register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
+	register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
+	register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
+	register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
+	register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
+	register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
+	register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
+	register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
+	struct sbiret ret;
+
+	asm volatile (
+		"ecall"
+		: "+r" (a0), "+r" (a1)
+		: "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
+		: "memory");
+	ret.error = a0;
+	ret.value = a1;
+
+	return ret;
+}
diff --git a/tools/testing/selftests/kvm/lib/riscv/ucall.c b/tools/testing/selftests/kvm/lib/riscv/ucall.c
index fe6d1004f018..14ee17151a59 100644
--- a/tools/testing/selftests/kvm/lib/riscv/ucall.c
+++ b/tools/testing/selftests/kvm/lib/riscv/ucall.c
@@ -10,32 +10,6 @@
 #include "kvm_util.h"
 #include "processor.h"
 
-struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
-			unsigned long arg1, unsigned long arg2,
-			unsigned long arg3, unsigned long arg4,
-			unsigned long arg5)
-{
-	register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
-	register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
-	register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
-	register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
-	register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
-	register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
-	register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
-	register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
-	struct sbiret ret;
-
-	asm volatile (
-		"ecall"
-		: "+r" (a0), "+r" (a1)
-		: "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
-		: "memory");
-	ret.error = a0;
-	ret.value = a1;
-
-	return ret;
-}
-
 void *ucall_arch_get_ucall(struct kvm_vcpu *vcpu)
 {
 	struct kvm_run *run = vcpu->run;
-- 
2.43.0


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
	virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu,
	guoren@kernel.org, conor.dooley@microchip.com
Subject: [PATCH v4 10/13] RISC-V: KVM: selftests: Move sbi_ecall to processor.c
Date: Wed, 20 Dec 2023 17:00:23 +0100	[thread overview]
Message-ID: <20231220160012.40184-25-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231220160012.40184-15-ajones@ventanamicro.com>

sbi_ecall() isn't ucall specific and its prototype is already in
processor.h. Move its implementation to processor.c.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 .../selftests/kvm/lib/riscv/processor.c       | 26 +++++++++++++++++++
 tools/testing/selftests/kvm/lib/riscv/ucall.c | 26 -------------------
 2 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c
index 6c25f7843ef4..6905a4348380 100644
--- a/tools/testing/selftests/kvm/lib/riscv/processor.c
+++ b/tools/testing/selftests/kvm/lib/riscv/processor.c
@@ -367,3 +367,29 @@ void vcpu_args_set(struct kvm_vcpu *vcpu, unsigned int num, ...)
 void assert_on_unhandled_exception(struct kvm_vcpu *vcpu)
 {
 }
+
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+			unsigned long arg1, unsigned long arg2,
+			unsigned long arg3, unsigned long arg4,
+			unsigned long arg5)
+{
+	register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
+	register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
+	register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
+	register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
+	register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
+	register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
+	register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
+	register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
+	struct sbiret ret;
+
+	asm volatile (
+		"ecall"
+		: "+r" (a0), "+r" (a1)
+		: "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
+		: "memory");
+	ret.error = a0;
+	ret.value = a1;
+
+	return ret;
+}
diff --git a/tools/testing/selftests/kvm/lib/riscv/ucall.c b/tools/testing/selftests/kvm/lib/riscv/ucall.c
index fe6d1004f018..14ee17151a59 100644
--- a/tools/testing/selftests/kvm/lib/riscv/ucall.c
+++ b/tools/testing/selftests/kvm/lib/riscv/ucall.c
@@ -10,32 +10,6 @@
 #include "kvm_util.h"
 #include "processor.h"
 
-struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
-			unsigned long arg1, unsigned long arg2,
-			unsigned long arg3, unsigned long arg4,
-			unsigned long arg5)
-{
-	register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
-	register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
-	register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
-	register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
-	register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
-	register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
-	register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
-	register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
-	struct sbiret ret;
-
-	asm volatile (
-		"ecall"
-		: "+r" (a0), "+r" (a1)
-		: "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
-		: "memory");
-	ret.error = a0;
-	ret.value = a1;
-
-	return ret;
-}
-
 void *ucall_arch_get_ucall(struct kvm_vcpu *vcpu)
 {
 	struct kvm_run *run = vcpu->run;
-- 
2.43.0


  parent reply	other threads:[~2023-12-20 16:01 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-20 16:00 [PATCH v4 00/13] RISC-V: Add steal-time support Andrew Jones
2023-12-20 16:00 ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 01/13] RISC-V: paravirt: Add skeleton for pv-time support Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-29  0:16   ` Palmer Dabbelt
2023-12-29  0:16     ` Palmer Dabbelt
2023-12-20 16:00 ` [PATCH v4 02/13] RISC-V: Add SBI STA extension definitions Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-29  0:16   ` Palmer Dabbelt
2023-12-29  0:16     ` Palmer Dabbelt
2023-12-20 16:00 ` [PATCH v4 03/13] RISC-V: paravirt: Implement steal-time support Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-29  0:16   ` Palmer Dabbelt
2023-12-29  0:16     ` Palmer Dabbelt
2023-12-20 16:00 ` [PATCH v4 04/13] RISC-V: KVM: Add SBI STA extension skeleton Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 05/13] RISC-V: KVM: Add steal-update vcpu request Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 06/13] RISC-V: KVM: Add SBI STA info to vcpu_arch Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 07/13] RISC-V: KVM: Add support for SBI extension registers Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 08/13] RISC-V: KVM: Add support for SBI STA registers Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 09/13] RISC-V: KVM: Implement SBI STA extension Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` Andrew Jones [this message]
2023-12-20 16:00   ` [PATCH v4 10/13] RISC-V: KVM: selftests: Move sbi_ecall to processor.c Andrew Jones
2023-12-20 16:00 ` [PATCH v4 11/13] RISC-V: KVM: selftests: Add guest_sbi_probe_extension Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 12/13] RISC-V: KVM: selftests: Add steal_time test support Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:00 ` [PATCH v4 13/13] RISC-V: KVM: selftests: Add get-reg-list test for STA registers Andrew Jones
2023-12-20 16:00   ` Andrew Jones
2023-12-20 16:11 ` [PATCH v4 00/13] RISC-V: Add steal-time support Anup Patel
2023-12-20 16:11   ` Anup Patel
2023-12-29  6:52 ` Anup Patel
2023-12-29  6:52   ` Anup Patel
2024-01-20 21:09 ` patchwork-bot+linux-riscv
2024-01-20 21:09   ` patchwork-bot+linux-riscv

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