From: Thomas Richard <thomas.richard@bootlin.com> To: "Linus Walleij" <linus.walleij@linaro.org>, "Bartosz Golaszewski" <brgl@bgdev.pl>, "Tony Lindgren" <tony@atomide.com>, "Aaro Koskinen" <aaro.koskinen@iki.fi>, "Janusz Krzysztofik" <jmkrzyszt@gmail.com>, "Vignesh R" <vigneshr@ti.com>, "Andi Shyti" <andi.shyti@kernel.org>, "Peter Rosin" <peda@axentia.se>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Rob Herring" <robh@kernel.org>, "Bjorn Helgaas" <bhelgaas@google.com>, "Siddharth Vadapalli" <s-vadapalli@ti.com> Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, gregory.clement@bootlin.com, theo.lebrun@bootlin.com, thomas.petazzoni@bootlin.com, u-kumar1@ti.com, Thomas Richard <thomas.richard@bootlin.com> Subject: [PATCH v5 11/11] PCI: j721e: Add suspend and resume support Date: Tue, 16 Apr 2024 15:30:00 +0200 [thread overview] Message-ID: <20240102-j7200-pcie-s2r-v5-11-4b8c46711ded@bootlin.com> (raw) In-Reply-To: <20240102-j7200-pcie-s2r-v5-0-4b8c46711ded@bootlin.com> From: Théo Lebrun <theo.lebrun@bootlin.com> Add suspend and resume support. Only the rc mode is supported. During the suspend stage PERST# is asserted, then deasserted during the resume stage. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> --- drivers/pci/controller/cadence/pci-j721e.c | 98 ++++++++++++++++++++++++++++-- 1 file changed, 92 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 967a5bf38e26..96316a79ab8a 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -7,6 +7,8 @@ */ #include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/container_of.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> #include <linux/io.h> @@ -22,6 +24,8 @@ #include "../../pci.h" #include "pcie-cadence.h" +#define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie) + #define ENABLE_REG_SYS_2 0x108 #define STATUS_REG_SYS_2 0x508 #define STATUS_CLR_REG_SYS_2 0x708 @@ -531,12 +535,12 @@ static int j721e_pcie_probe(struct platform_device *pdev) pcie->refclk = clk; /* - * "Power Sequencing and Reset Signal Timings" table in - * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0 - * indicates PERST# should be deasserted after minimum of 100us - * once REFCLK is stable. The REFCLK to the connector in RC - * mode is selected while enabling the PHY. So deassert PERST# - * after 100 us. + * "Power Sequencing and Reset Signal Timings" table (section + * 2.9.2) in PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, + * REV. 5.1 indicates PERST# should be deasserted after minimum + * of 100us once REFCLK is stable (symbol T_PERST-CLK). + * The REFCLK to the connector in RC mode is selected while + * enabling the PHY. So deassert PERST# after 100 us. */ if (gpiod) { fsleep(PCIE_T_PERST_CLK_US); @@ -588,6 +592,87 @@ static void j721e_pcie_remove(struct platform_device *pdev) pm_runtime_disable(dev); } +static int j721e_pcie_suspend_noirq(struct device *dev) +{ + struct j721e_pcie *pcie = dev_get_drvdata(dev); + + if (pcie->mode == PCI_MODE_RC) { + gpiod_set_value_cansleep(pcie->reset_gpio, 0); + clk_disable_unprepare(pcie->refclk); + } + + cdns_pcie_disable_phy(pcie->cdns_pcie); + + return 0; +} + +static int j721e_pcie_resume_noirq(struct device *dev) +{ + struct j721e_pcie *pcie = dev_get_drvdata(dev); + struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; + int ret; + + ret = j721e_pcie_ctrl_init(pcie); + if (ret < 0) + return ret; + + j721e_pcie_config_link_irq(pcie); + + /* + * This is not called explicitly in the probe, it is called by + * cdns_pcie_init_phy(). + */ + ret = cdns_pcie_enable_phy(pcie->cdns_pcie); + if (ret < 0) + return ret; + + if (pcie->mode == PCI_MODE_RC) { + struct cdns_pcie_rc *rc = cdns_pcie_to_rc(cdns_pcie); + + ret = clk_prepare_enable(pcie->refclk); + if (ret < 0) + return ret; + + /* + * "Power Sequencing and Reset Signal Timings" table (section + * 2.9.2) in PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, + * REV. 5.1 indicates PERST# should be deasserted after minimum + * of 100us once REFCLK is stable (symbol T_PERST-CLK). + * The REFCLK to the connector in RC mode is selected while + * enabling the PHY. So deassert PERST# after 100 us. + */ + if (pcie->reset_gpio) { + fsleep(PCIE_T_PERST_CLK_US); + gpiod_set_value_cansleep(pcie->reset_gpio, 1); + } + + ret = cdns_pcie_host_link_setup(rc); + if (ret < 0) { + clk_disable_unprepare(pcie->refclk); + return ret; + } + + /* + * Reset internal status of BARs to force reinitialization in + * cdns_pcie_host_init(). + */ + for (enum cdns_pcie_rp_bar bar = RP_BAR0; bar <= RP_NO_BAR; bar++) + rc->avail_ib_bar[bar] = true; + + ret = cdns_pcie_host_init(rc); + if (ret) { + clk_disable_unprepare(pcie->refclk); + return ret; + } + } + + return 0; +} + +static DEFINE_NOIRQ_DEV_PM_OPS(j721e_pcie_pm_ops, + j721e_pcie_suspend_noirq, + j721e_pcie_resume_noirq); + static struct platform_driver j721e_pcie_driver = { .probe = j721e_pcie_probe, .remove_new = j721e_pcie_remove, @@ -595,6 +680,7 @@ static struct platform_driver j721e_pcie_driver = { .name = "j721e-pcie", .of_match_table = of_j721e_pcie_match, .suppress_bind_attrs = true, + .pm = pm_sleep_ptr(&j721e_pcie_pm_ops), }, }; builtin_platform_driver(j721e_pcie_driver); -- 2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Richard <thomas.richard@bootlin.com> To: "Linus Walleij" <linus.walleij@linaro.org>, "Bartosz Golaszewski" <brgl@bgdev.pl>, "Tony Lindgren" <tony@atomide.com>, "Aaro Koskinen" <aaro.koskinen@iki.fi>, "Janusz Krzysztofik" <jmkrzyszt@gmail.com>, "Vignesh R" <vigneshr@ti.com>, "Andi Shyti" <andi.shyti@kernel.org>, "Peter Rosin" <peda@axentia.se>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Rob Herring" <robh@kernel.org>, "Bjorn Helgaas" <bhelgaas@google.com>, "Siddharth Vadapalli" <s-vadapalli@ti.com> Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, gregory.clement@bootlin.com, theo.lebrun@bootlin.com, thomas.petazzoni@bootlin.com, u-kumar1@ti.com, Thomas Richard <thomas.richard@bootlin.com> Subject: [PATCH v5 11/11] PCI: j721e: Add suspend and resume support Date: Tue, 16 Apr 2024 15:30:00 +0200 [thread overview] Message-ID: <20240102-j7200-pcie-s2r-v5-11-4b8c46711ded@bootlin.com> (raw) In-Reply-To: <20240102-j7200-pcie-s2r-v5-0-4b8c46711ded@bootlin.com> From: Théo Lebrun <theo.lebrun@bootlin.com> Add suspend and resume support. Only the rc mode is supported. During the suspend stage PERST# is asserted, then deasserted during the resume stage. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> --- drivers/pci/controller/cadence/pci-j721e.c | 98 ++++++++++++++++++++++++++++-- 1 file changed, 92 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 967a5bf38e26..96316a79ab8a 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -7,6 +7,8 @@ */ #include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/container_of.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> #include <linux/io.h> @@ -22,6 +24,8 @@ #include "../../pci.h" #include "pcie-cadence.h" +#define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie) + #define ENABLE_REG_SYS_2 0x108 #define STATUS_REG_SYS_2 0x508 #define STATUS_CLR_REG_SYS_2 0x708 @@ -531,12 +535,12 @@ static int j721e_pcie_probe(struct platform_device *pdev) pcie->refclk = clk; /* - * "Power Sequencing and Reset Signal Timings" table in - * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0 - * indicates PERST# should be deasserted after minimum of 100us - * once REFCLK is stable. The REFCLK to the connector in RC - * mode is selected while enabling the PHY. So deassert PERST# - * after 100 us. + * "Power Sequencing and Reset Signal Timings" table (section + * 2.9.2) in PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, + * REV. 5.1 indicates PERST# should be deasserted after minimum + * of 100us once REFCLK is stable (symbol T_PERST-CLK). + * The REFCLK to the connector in RC mode is selected while + * enabling the PHY. So deassert PERST# after 100 us. */ if (gpiod) { fsleep(PCIE_T_PERST_CLK_US); @@ -588,6 +592,87 @@ static void j721e_pcie_remove(struct platform_device *pdev) pm_runtime_disable(dev); } +static int j721e_pcie_suspend_noirq(struct device *dev) +{ + struct j721e_pcie *pcie = dev_get_drvdata(dev); + + if (pcie->mode == PCI_MODE_RC) { + gpiod_set_value_cansleep(pcie->reset_gpio, 0); + clk_disable_unprepare(pcie->refclk); + } + + cdns_pcie_disable_phy(pcie->cdns_pcie); + + return 0; +} + +static int j721e_pcie_resume_noirq(struct device *dev) +{ + struct j721e_pcie *pcie = dev_get_drvdata(dev); + struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; + int ret; + + ret = j721e_pcie_ctrl_init(pcie); + if (ret < 0) + return ret; + + j721e_pcie_config_link_irq(pcie); + + /* + * This is not called explicitly in the probe, it is called by + * cdns_pcie_init_phy(). + */ + ret = cdns_pcie_enable_phy(pcie->cdns_pcie); + if (ret < 0) + return ret; + + if (pcie->mode == PCI_MODE_RC) { + struct cdns_pcie_rc *rc = cdns_pcie_to_rc(cdns_pcie); + + ret = clk_prepare_enable(pcie->refclk); + if (ret < 0) + return ret; + + /* + * "Power Sequencing and Reset Signal Timings" table (section + * 2.9.2) in PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, + * REV. 5.1 indicates PERST# should be deasserted after minimum + * of 100us once REFCLK is stable (symbol T_PERST-CLK). + * The REFCLK to the connector in RC mode is selected while + * enabling the PHY. So deassert PERST# after 100 us. + */ + if (pcie->reset_gpio) { + fsleep(PCIE_T_PERST_CLK_US); + gpiod_set_value_cansleep(pcie->reset_gpio, 1); + } + + ret = cdns_pcie_host_link_setup(rc); + if (ret < 0) { + clk_disable_unprepare(pcie->refclk); + return ret; + } + + /* + * Reset internal status of BARs to force reinitialization in + * cdns_pcie_host_init(). + */ + for (enum cdns_pcie_rp_bar bar = RP_BAR0; bar <= RP_NO_BAR; bar++) + rc->avail_ib_bar[bar] = true; + + ret = cdns_pcie_host_init(rc); + if (ret) { + clk_disable_unprepare(pcie->refclk); + return ret; + } + } + + return 0; +} + +static DEFINE_NOIRQ_DEV_PM_OPS(j721e_pcie_pm_ops, + j721e_pcie_suspend_noirq, + j721e_pcie_resume_noirq); + static struct platform_driver j721e_pcie_driver = { .probe = j721e_pcie_probe, .remove_new = j721e_pcie_remove, @@ -595,6 +680,7 @@ static struct platform_driver j721e_pcie_driver = { .name = "j721e-pcie", .of_match_table = of_j721e_pcie_match, .suppress_bind_attrs = true, + .pm = pm_sleep_ptr(&j721e_pcie_pm_ops), }, }; builtin_platform_driver(j721e_pcie_driver); -- 2.39.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-04-16 13:30 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-04-16 13:29 [PATCH v5 00/11] Add suspend to ram support for PCIe on J7200 Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 01/11] gpio: pca953x: move suspend()/resume() to suspend_noirq()/resume_noirq() Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-23 9:42 ` Geert Uytterhoeven 2024-04-23 9:42 ` Geert Uytterhoeven 2024-04-23 10:34 ` Andy Shevchenko 2024-04-23 10:34 ` Andy Shevchenko 2024-04-23 10:53 ` Thomas Richard 2024-04-23 10:53 ` Thomas Richard 2024-04-23 15:31 ` Geert Uytterhoeven 2024-04-23 15:31 ` Geert Uytterhoeven 2024-04-16 13:29 ` [PATCH v5 02/11] i2c: omap: wakeup the controller during suspend() callback Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-19 8:47 ` Andi Shyti 2024-04-19 8:47 ` Andi Shyti 2024-04-22 9:40 ` Thomas Richard 2024-04-22 9:40 ` Thomas Richard 2024-04-22 19:44 ` Bjorn Helgaas 2024-04-22 19:44 ` Bjorn Helgaas 2024-04-24 10:24 ` Thomas Richard 2024-04-24 10:24 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 03/11] mux: add mux_chip_resume() function Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 04/11] mux: mmio: add resume support Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 05/11] PCI: cadence: Extract link setup sequence from cdns_pcie_host_setup() Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 14:16 ` Dan Carpenter 2024-04-16 14:16 ` Dan Carpenter 2024-04-16 16:01 ` Thomas Richard 2024-04-16 16:01 ` Thomas Richard 2024-05-14 13:15 ` Thomas Richard 2024-05-14 13:15 ` Thomas Richard 2024-05-15 7:05 ` Dan Carpenter 2024-05-15 7:05 ` Dan Carpenter 2024-04-16 13:29 ` [PATCH v5 06/11] PCI: cadence: Set cdns_pcie_host_init() global Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 07/11] PCI: j721e: Use dev_err_probe() in the probe() function Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 08/11] PCI: j721e: Add reset GPIO to struct j721e_pcie Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 09/11] PCI: Add T_PERST_CLK_US macro Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:29 ` [PATCH v5 10/11] PCI: j721e: Use " Thomas Richard 2024-04-16 13:29 ` Thomas Richard 2024-04-16 13:30 ` Thomas Richard [this message] 2024-04-16 13:30 ` [PATCH v5 11/11] PCI: j721e: Add suspend and resume support Thomas Richard
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