From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: linux-mediatek@lists.infradead.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, hsinyi@chromium.org, nfraprado@collabora.com, macpaul.lin@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 06/15] arm64: dts: mediatek: radxa-nio-12l: Add Ethernet controller and Xceiver Date: Fri, 12 Jan 2024 10:46:23 +0100 [thread overview] Message-ID: <20240112094632.66310-7-angelogioacchino.delregno@collabora.com> (raw) In-Reply-To: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> Configure and enable the ethernet controller found on the MT8395 SoC, along with the MDIO PHY/Transceiver (RTL8211FD) found on this board, enabling 10/100/1000M Ethernet connectivity. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../dts/mediatek/mt8395-radxa-nio-12l.dts | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts index 0daf27410311..221d7062d5ef 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts @@ -21,6 +21,7 @@ / { compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195"; aliases { + ethernet0 = ð serial0 = &uart0; }; @@ -132,6 +133,26 @@ apu_mem: memory@62000000 { }; }; +ð { + phy-mode = "rgmii-rxid"; + phy-handle = <&rgmii_phy>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ð_default_pins>; + pinctrl-1 = <ð_sleep_pins>; + mediatek,tx-delay-ps = <2030>; + mediatek,mac-wol; + snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; + snps,reset-delays-us = <0 20000 100000>; + status = "okay"; + + mdio { + rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; + reg = <0x1>; + }; + }; +}; + &i2c2 { clock-frequency = <400000>; pinctrl-0 = <&i2c2_pins>; @@ -297,6 +318,77 @@ &mt6359_vsram_others_ldo_reg { }; &pio { + eth_default_pins: eth-default-pins { + pins-cc { + pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>, + <PINMUX_GPIO86__FUNC_GBE_RXC>, + <PINMUX_GPIO87__FUNC_GBE_RXDV>, + <PINMUX_GPIO88__FUNC_GBE_TXEN>; + drive-strength = <8>; + }; + + pins-mdio { + pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>, + <PINMUX_GPIO90__FUNC_GBE_MDIO>; + input-enable; + }; + + pins-power { + pinmux = <PINMUX_GPIO91__FUNC_GPIO91>, + <PINMUX_GPIO92__FUNC_GPIO92>; + output-high; + }; + + pins-rst { + pinmux = <PINMUX_GPIO93__FUNC_GPIO93>; + }; + + pins-rxd { + pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>, + <PINMUX_GPIO82__FUNC_GBE_RXD2>, + <PINMUX_GPIO83__FUNC_GBE_RXD1>, + <PINMUX_GPIO84__FUNC_GBE_RXD0>; + }; + + pins-txd { + pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>, + <PINMUX_GPIO78__FUNC_GBE_TXD2>, + <PINMUX_GPIO79__FUNC_GBE_TXD1>, + <PINMUX_GPIO80__FUNC_GBE_TXD0>; + drive-strength = <8>; + }; + }; + + eth_sleep_pins: eth-sleep-pins { + pins-cc { + pinmux = <PINMUX_GPIO85__FUNC_GPIO85>, + <PINMUX_GPIO86__FUNC_GPIO86>, + <PINMUX_GPIO87__FUNC_GPIO87>, + <PINMUX_GPIO88__FUNC_GPIO88>; + }; + + pins-mdio { + pinmux = <PINMUX_GPIO89__FUNC_GPIO89>, + <PINMUX_GPIO90__FUNC_GPIO90>; + bias-disable; + input-disable; + }; + + pins-rxd { + pinmux = <PINMUX_GPIO81__FUNC_GPIO81>, + <PINMUX_GPIO82__FUNC_GPIO82>, + <PINMUX_GPIO83__FUNC_GPIO83>, + <PINMUX_GPIO84__FUNC_GPIO84>; + }; + + pins-txd { + pinmux = <PINMUX_GPIO77__FUNC_GPIO77>, + <PINMUX_GPIO78__FUNC_GPIO78>, + <PINMUX_GPIO79__FUNC_GPIO79>, + <PINMUX_GPIO80__FUNC_GPIO80>; + }; + }; + i2c2_pins: i2c2-pins { pins-bus { pinmux = <PINMUX_GPIO12__FUNC_SDA2>, -- 2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: linux-mediatek@lists.infradead.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, hsinyi@chromium.org, nfraprado@collabora.com, macpaul.lin@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 06/15] arm64: dts: mediatek: radxa-nio-12l: Add Ethernet controller and Xceiver Date: Fri, 12 Jan 2024 10:46:23 +0100 [thread overview] Message-ID: <20240112094632.66310-7-angelogioacchino.delregno@collabora.com> (raw) In-Reply-To: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> Configure and enable the ethernet controller found on the MT8395 SoC, along with the MDIO PHY/Transceiver (RTL8211FD) found on this board, enabling 10/100/1000M Ethernet connectivity. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../dts/mediatek/mt8395-radxa-nio-12l.dts | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts index 0daf27410311..221d7062d5ef 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts @@ -21,6 +21,7 @@ / { compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195"; aliases { + ethernet0 = ð serial0 = &uart0; }; @@ -132,6 +133,26 @@ apu_mem: memory@62000000 { }; }; +ð { + phy-mode = "rgmii-rxid"; + phy-handle = <&rgmii_phy>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ð_default_pins>; + pinctrl-1 = <ð_sleep_pins>; + mediatek,tx-delay-ps = <2030>; + mediatek,mac-wol; + snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; + snps,reset-delays-us = <0 20000 100000>; + status = "okay"; + + mdio { + rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; + reg = <0x1>; + }; + }; +}; + &i2c2 { clock-frequency = <400000>; pinctrl-0 = <&i2c2_pins>; @@ -297,6 +318,77 @@ &mt6359_vsram_others_ldo_reg { }; &pio { + eth_default_pins: eth-default-pins { + pins-cc { + pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>, + <PINMUX_GPIO86__FUNC_GBE_RXC>, + <PINMUX_GPIO87__FUNC_GBE_RXDV>, + <PINMUX_GPIO88__FUNC_GBE_TXEN>; + drive-strength = <8>; + }; + + pins-mdio { + pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>, + <PINMUX_GPIO90__FUNC_GBE_MDIO>; + input-enable; + }; + + pins-power { + pinmux = <PINMUX_GPIO91__FUNC_GPIO91>, + <PINMUX_GPIO92__FUNC_GPIO92>; + output-high; + }; + + pins-rst { + pinmux = <PINMUX_GPIO93__FUNC_GPIO93>; + }; + + pins-rxd { + pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>, + <PINMUX_GPIO82__FUNC_GBE_RXD2>, + <PINMUX_GPIO83__FUNC_GBE_RXD1>, + <PINMUX_GPIO84__FUNC_GBE_RXD0>; + }; + + pins-txd { + pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>, + <PINMUX_GPIO78__FUNC_GBE_TXD2>, + <PINMUX_GPIO79__FUNC_GBE_TXD1>, + <PINMUX_GPIO80__FUNC_GBE_TXD0>; + drive-strength = <8>; + }; + }; + + eth_sleep_pins: eth-sleep-pins { + pins-cc { + pinmux = <PINMUX_GPIO85__FUNC_GPIO85>, + <PINMUX_GPIO86__FUNC_GPIO86>, + <PINMUX_GPIO87__FUNC_GPIO87>, + <PINMUX_GPIO88__FUNC_GPIO88>; + }; + + pins-mdio { + pinmux = <PINMUX_GPIO89__FUNC_GPIO89>, + <PINMUX_GPIO90__FUNC_GPIO90>; + bias-disable; + input-disable; + }; + + pins-rxd { + pinmux = <PINMUX_GPIO81__FUNC_GPIO81>, + <PINMUX_GPIO82__FUNC_GPIO82>, + <PINMUX_GPIO83__FUNC_GPIO83>, + <PINMUX_GPIO84__FUNC_GPIO84>; + }; + + pins-txd { + pinmux = <PINMUX_GPIO77__FUNC_GPIO77>, + <PINMUX_GPIO78__FUNC_GPIO78>, + <PINMUX_GPIO79__FUNC_GPIO79>, + <PINMUX_GPIO80__FUNC_GPIO80>; + }; + }; + i2c2_pins: i2c2-pins { pins-bus { pinmux = <PINMUX_GPIO12__FUNC_SDA2>, -- 2.43.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-01-12 9:46 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-01-12 9:46 [PATCH 00/15] MediaTek: Introduce MT8395 Radxa NIO 12L devicetree AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 01/15] dt-bindings: arm64: mediatek: Add MT8395 Radxa NIO 12L board compatible AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 17:06 ` Conor Dooley 2024-01-12 17:06 ` Conor Dooley 2024-01-12 9:46 ` [PATCH 02/15] arm64: dts: mediatek: Introduce the MT8395 Radxa NIO 12L board AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 03/15] arm64: dts: mediatek: radxa-nio-12l: Enable I2C 2/4/6 busses AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 04/15] arm64: dts: mediatek: radxa-nio-12l: Add external MT6360 PMIC on I2C6 AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-16 8:16 ` Krzysztof Kozlowski 2024-01-16 8:16 ` Krzysztof Kozlowski 2024-01-22 7:28 ` Matthias Brugger 2024-01-22 7:28 ` Matthias Brugger 2024-01-12 9:46 ` [PATCH 05/15] arm64: dts: mediatek: radxa-nio-12l: Configure board regulators AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno [this message] 2024-01-12 9:46 ` [PATCH 06/15] arm64: dts: mediatek: radxa-nio-12l: Add Ethernet controller and Xceiver AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 07/15] arm64: dts: mediatek: radxa-nio-12l: Add MT6360 battery charger AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-16 8:17 ` Krzysztof Kozlowski 2024-01-16 8:17 ` Krzysztof Kozlowski 2024-01-12 9:46 ` [PATCH 08/15] arm64: dts: mediatek: radxa-nio-12l: Add support for eMMC and MicroSD AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 09/15] arm64: dts: mediatek: radxa-nio-12l: Enable System Companion Processor AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-16 8:18 ` Krzysztof Kozlowski 2024-01-16 8:18 ` Krzysztof Kozlowski 2024-01-16 8:41 ` AngeloGioacchino Del Regno 2024-01-16 8:41 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 10/15] arm64: dts: mediatek: radxa-nio-12l: Enable PCI-Express 0 for USB HUB AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 11/15] arm64: dts: mediatek: radxa-nio-12l: Enable the USB XHCI controllers AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 12/15] arm64: dts: mediatek: radxa-nio-12l: Enable PCI-Express 1 for WiFi AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 13/15] arm64: dts: mediatek: radxa-nio-12l: Enable SPI1/2 for 40pin header AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 14/15] arm64: dts: mediatek: radxa-nio-12l: Enable UART1 " AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno 2024-01-12 9:46 ` [PATCH 15/15] arm64: dts: mediatek: radxa-nio-12l: Enable Panfrost for Mali GPU AngeloGioacchino Del Regno 2024-01-12 9:46 ` AngeloGioacchino Del Regno
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