From: Shaoqin Huang <shahuang@redhat.com> To: Oliver Upton <oliver.upton@linux.dev>, Marc Zyngier <maz@kernel.org>, kvmarm@lists.linux.dev Cc: Eric Auger <eauger@redhat.com>, Shaoqin Huang <shahuang@redhat.com>, Eric Auger <eric.auger@redhat.com>, James Morse <james.morse@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Zenghui Yu <yuzenghui@huawei.com>, Paolo Bonzini <pbonzini@redhat.com>, Shuah Khan <shuah@kernel.org>, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/5] KVM: selftests: aarch64: Fix the buggy [enable|disable]_counter Date: Tue, 16 Jan 2024 01:01:21 -0500 [thread overview] Message-ID: <20240116060129.55473-4-shahuang@redhat.com> (raw) In-Reply-To: <20240116060129.55473-1-shahuang@redhat.com> In general, the set/clr registers should always be used in their write form, never in a RMW form (imagine an interrupt disabling a counter between the read and the write...). The current implementation of [enable|disable]_counter both use the RMW form, fix them by directly write to the set/clr registers. At the same time, it also fix the buggy disable_counter() which would end up disabling all the counters. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Shaoqin Huang <shahuang@redhat.com> --- tools/testing/selftests/kvm/include/aarch64/vpmu.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/include/aarch64/vpmu.h b/tools/testing/selftests/kvm/include/aarch64/vpmu.h index e0cc1ca1c4b7..644dae3814b5 100644 --- a/tools/testing/selftests/kvm/include/aarch64/vpmu.h +++ b/tools/testing/selftests/kvm/include/aarch64/vpmu.h @@ -78,17 +78,13 @@ static inline void write_sel_evtyper(int sel, unsigned long val) static inline void enable_counter(int idx) { - uint64_t v = read_sysreg(pmcntenset_el0); - - write_sysreg(BIT(idx) | v, pmcntenset_el0); + write_sysreg(BIT(idx), pmcntenset_el0); isb(); } static inline void disable_counter(int idx) { - uint64_t v = read_sysreg(pmcntenset_el0); - - write_sysreg(BIT(idx) | v, pmcntenclr_el0); + write_sysreg(BIT(idx), pmcntenclr_el0); isb(); } -- 2.40.1
WARNING: multiple messages have this Message-ID (diff)
From: Shaoqin Huang <shahuang@redhat.com> To: Oliver Upton <oliver.upton@linux.dev>, Marc Zyngier <maz@kernel.org>, kvmarm@lists.linux.dev Cc: Eric Auger <eauger@redhat.com>, Shaoqin Huang <shahuang@redhat.com>, Eric Auger <eric.auger@redhat.com>, James Morse <james.morse@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Zenghui Yu <yuzenghui@huawei.com>, Paolo Bonzini <pbonzini@redhat.com>, Shuah Khan <shuah@kernel.org>, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/5] KVM: selftests: aarch64: Fix the buggy [enable|disable]_counter Date: Tue, 16 Jan 2024 01:01:21 -0500 [thread overview] Message-ID: <20240116060129.55473-4-shahuang@redhat.com> (raw) In-Reply-To: <20240116060129.55473-1-shahuang@redhat.com> In general, the set/clr registers should always be used in their write form, never in a RMW form (imagine an interrupt disabling a counter between the read and the write...). The current implementation of [enable|disable]_counter both use the RMW form, fix them by directly write to the set/clr registers. At the same time, it also fix the buggy disable_counter() which would end up disabling all the counters. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Shaoqin Huang <shahuang@redhat.com> --- tools/testing/selftests/kvm/include/aarch64/vpmu.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/include/aarch64/vpmu.h b/tools/testing/selftests/kvm/include/aarch64/vpmu.h index e0cc1ca1c4b7..644dae3814b5 100644 --- a/tools/testing/selftests/kvm/include/aarch64/vpmu.h +++ b/tools/testing/selftests/kvm/include/aarch64/vpmu.h @@ -78,17 +78,13 @@ static inline void write_sel_evtyper(int sel, unsigned long val) static inline void enable_counter(int idx) { - uint64_t v = read_sysreg(pmcntenset_el0); - - write_sysreg(BIT(idx) | v, pmcntenset_el0); + write_sysreg(BIT(idx), pmcntenset_el0); isb(); } static inline void disable_counter(int idx) { - uint64_t v = read_sysreg(pmcntenset_el0); - - write_sysreg(BIT(idx) | v, pmcntenclr_el0); + write_sysreg(BIT(idx), pmcntenclr_el0); isb(); } -- 2.40.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-01-16 6:01 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-01-16 6:01 [PATCH v3 0/5] KVM: selftests: aarch64: Introduce pmu_event_filter_test Shaoqin Huang 2024-01-16 6:01 ` Shaoqin Huang 2024-01-16 6:01 ` [PATCH v3 1/5] KVM: selftests: aarch64: Make the [create|destroy]_vpmu_vm() public Shaoqin Huang 2024-01-16 6:01 ` Shaoqin Huang 2024-01-16 6:01 ` [PATCH v3 2/5] KVM: selftests: aarch64: Move pmu helper functions into vpmu.h Shaoqin Huang 2024-01-16 6:01 ` Shaoqin Huang 2024-01-16 6:01 ` Shaoqin Huang [this message] 2024-01-16 6:01 ` [PATCH v3 3/5] KVM: selftests: aarch64: Fix the buggy [enable|disable]_counter Shaoqin Huang 2024-01-16 6:01 ` [PATCH v3 4/5] KVM: selftests: aarch64: Introduce pmu_event_filter_test Shaoqin Huang 2024-01-16 6:01 ` Shaoqin Huang 2024-01-16 6:01 ` [PATCH v3 5/5] KVM: selftests: aarch64: Add invalid filter test in pmu_event_filter_test Shaoqin Huang 2024-01-16 6:01 ` Shaoqin Huang 2024-01-26 10:25 ` [PATCH v3 0/5] KVM: selftests: aarch64: Introduce pmu_event_filter_test Eric Auger 2024-01-26 10:25 ` Eric Auger 2024-01-31 3:11 ` Shaoqin Huang 2024-01-31 3:11 ` Shaoqin Huang
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