From: Zhifeng Tang <zhifeng.tang@unisoc.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Orson Zhai <orsonzhai@gmail.com>,
Baolin Wang <baolin.wang@linux.alibaba.com>,
Chunyan Zhang <zhang.lyra@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Zhifeng Tang <zhifeng.tang23@gmail.com>,
Wenming Wu <wenming.wu@unisoc.com>
Subject: [PATCH V4 3/3] arm64: dts: sprd: Add reset controller driver for UMS512
Date: Tue, 23 Jan 2024 10:56:13 +0800 [thread overview]
Message-ID: <20240123025613.3976-4-zhifeng.tang@unisoc.com> (raw)
In-Reply-To: <20240123025613.3976-1-zhifeng.tang@unisoc.com>
From: "zhifeng.tang" <zhifeng.tang@unisoc.com>
In most of Sprd SOCs,The clock controller register block also
contains reset bits for some of these peripherals,so reset
controller and clock provider are combined together as a block,
and put it under the driver/clk/.
Signed-off-by: zhifeng.tang <zhifeng.tang@unisoc.com>
---
arch/arm64/boot/dts/sprd/ums512.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/sprd/ums512.dtsi b/arch/arm64/boot/dts/sprd/ums512.dtsi
index 024be594c47d..08d0adf6624c 100644
--- a/arch/arm64/boot/dts/sprd/ums512.dtsi
+++ b/arch/arm64/boot/dts/sprd/ums512.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/sprd,ums512-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/sprd,ums512-reset.h>
/ {
interrupt-parent = <&gic>;
@@ -182,6 +183,7 @@
clocks = <&ext_26m>;
clock-names = "ext-26m";
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
@@ -316,6 +318,7 @@
clocks = <&ext_26m>;
clock-names = "ext-26m";
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
@@ -333,6 +336,7 @@
clocks = <&ext_26m>;
clock-names = "ext-26m";
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
@@ -348,6 +352,7 @@
compatible = "sprd,ums512-audcpapb-gate";
reg = <0x0 0x300>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
@@ -363,6 +368,7 @@
compatible = "sprd,ums512-audcpahb-gate";
reg = <0x0 0x300>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
@@ -380,6 +386,7 @@
clock-names = "ext-26m";
reg = <0x0 0x100>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
@@ -401,6 +408,7 @@
compatible = "sprd,ums512-mm-gate-clk";
reg = <0x0 0x3000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
@@ -416,6 +424,7 @@
compatible = "sprd,ums512-apapb-gate";
reg = <0x0 0x3000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};
--
2.17.1
next prev parent reply other threads:[~2024-01-23 2:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-23 2:56 [PATCH V4 0/3] Add reset controller driver for ums512 Zhifeng Tang
2024-01-23 2:56 ` [PATCH V4 1/3] dt-bindings: reset: Add reset controller bindings for Unisoc's ums512 Zhifeng Tang
2024-01-23 2:56 ` [PATCH V4 2/3] clk: sprd: Add reset controller driver for ums512 Zhifeng Tang
2024-01-23 2:56 ` Zhifeng Tang [this message]
2024-04-11 6:42 ` [PATCH V4 0/3] " Stephen Boyd
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