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From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
Date: Tue, 30 Jan 2024 21:36:51 +0200	[thread overview]
Message-ID: <20240130193652.374270-4-juhapekka.heikkila@gmail.com> (raw)
In-Reply-To: <20240130193652.374270-1-juhapekka.heikkila@gmail.com>

Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 722c84a56607..fab0871f0cdf 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -10,9 +10,18 @@
 #include "intel_fb_pin.h"
 #include "xe_ggtt.h"
 #include "xe_gt.h"
+#include "xe_pat.h"
 
 #include <drm/ttm/ttm_bo.h>
 
+static bool is_compressed(const struct drm_framebuffer *fb)
+{
+	struct xe_bo *bo = intel_fb_obj(fb);
+	struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
+
+	return xe_pat_index_has_compression(xe, bo->pat_index);
+}
+
 static void
 write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
 		  u32 width, u32 height, u32 src_stride, u32 dst_stride)
@@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
 	if (ret)
 		goto err;
 
+	if (GRAPHICS_VER(xe) >= 20) {
+		if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
+		    is_compressed(&fb->base)) {
+			drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
+			ttm_bo_unreserve(&bo->ttm);
+			ret = -EINVAL;
+			goto err;
+		}
+		bo->has_sealed_pat_index = true;
+	}
+
 	if (IS_DGFX(xe))
 		ret = xe_bo_migrate(bo, XE_PL_VRAM0);
 	else
@@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
 	ttm_bo_unpin(&bo->ttm);
 	ttm_bo_unreserve(&bo->ttm);
 err:
+	bo->has_sealed_pat_index = false;
 	kfree(vma);
 	return ERR_PTR(ret);
 }
@@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
 		 vma->bo->ggtt_node.start != vma->node.start)
 		xe_ggtt_remove_node(ggtt, &vma->node);
 
+	vma->bo->has_sealed_pat_index = false;
+
 	ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
 	ttm_bo_unpin(&vma->bo->ttm);
 	ttm_bo_unreserve(&vma->bo->ttm);
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Subject: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
Date: Tue, 30 Jan 2024 21:36:51 +0200	[thread overview]
Message-ID: <20240130193652.374270-4-juhapekka.heikkila@gmail.com> (raw)
In-Reply-To: <20240130193652.374270-1-juhapekka.heikkila@gmail.com>

Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 722c84a56607..fab0871f0cdf 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -10,9 +10,18 @@
 #include "intel_fb_pin.h"
 #include "xe_ggtt.h"
 #include "xe_gt.h"
+#include "xe_pat.h"
 
 #include <drm/ttm/ttm_bo.h>
 
+static bool is_compressed(const struct drm_framebuffer *fb)
+{
+	struct xe_bo *bo = intel_fb_obj(fb);
+	struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
+
+	return xe_pat_index_has_compression(xe, bo->pat_index);
+}
+
 static void
 write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
 		  u32 width, u32 height, u32 src_stride, u32 dst_stride)
@@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
 	if (ret)
 		goto err;
 
+	if (GRAPHICS_VER(xe) >= 20) {
+		if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
+		    is_compressed(&fb->base)) {
+			drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
+			ttm_bo_unreserve(&bo->ttm);
+			ret = -EINVAL;
+			goto err;
+		}
+		bo->has_sealed_pat_index = true;
+	}
+
 	if (IS_DGFX(xe))
 		ret = xe_bo_migrate(bo, XE_PL_VRAM0);
 	else
@@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
 	ttm_bo_unpin(&bo->ttm);
 	ttm_bo_unreserve(&bo->ttm);
 err:
+	bo->has_sealed_pat_index = false;
 	kfree(vma);
 	return ERR_PTR(ret);
 }
@@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
 		 vma->bo->ggtt_node.start != vma->node.start)
 		xe_ggtt_remove_node(ggtt, &vma->node);
 
+	vma->bo->has_sealed_pat_index = false;
+
 	ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
 	ttm_bo_unpin(&vma->bo->ttm);
 	ttm_bo_unreserve(&vma->bo->ttm);
-- 
2.25.1


  parent reply	other threads:[~2024-01-30 19:38 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-30 19:36 ` Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 1/4] drm/xe/pat: annotate pat index table with compression info Juha-Pekka Heikkila
2024-01-30 19:36   ` Juha-Pekka Heikkila
2024-01-31  5:32   ` Ghimiray, Himal Prasad
2024-01-30 19:36 ` [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
2024-01-30 19:36   ` Juha-Pekka Heikkila
2024-01-31  6:02   ` Ghimiray, Himal Prasad
2024-01-31 18:56   ` Matt Roper
2024-02-01 14:17     ` Juha-Pekka Heikkila
2024-02-01 15:02       ` Juha-Pekka Heikkila
2024-01-30 19:36 ` Juha-Pekka Heikkila [this message]
2024-01-30 19:36   ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-31 11:40   ` Ville Syrjälä
2024-01-31 12:09     ` Ville Syrjälä
2024-01-30 19:36 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
2024-01-30 19:36   ` Juha-Pekka Heikkila
2024-01-31  2:06 ` ✓ CI.Patch_applied: success for Enable ccs compressed framebuffers on Xe2 (rev5) Patchwork
2024-01-31  2:07 ` ✓ CI.checkpatch: " Patchwork
2024-01-31  2:07 ` ✓ CI.KUnit: " Patchwork
2024-01-31  2:15 ` ✓ CI.Build: " Patchwork
2024-01-31  2:15 ` ✓ CI.Hooks: " Patchwork
2024-01-31  2:16 ` ✗ CI.checksparse: warning " Patchwork
2024-01-31  3:01 ` ✓ CI.BAT: success " Patchwork
2024-02-02  5:26 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev6) Patchwork
2024-02-02  7:09 ` ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-18 15:27   ` Juha-Pekka Heikkila
2024-01-19 11:48   ` Jani Nikula
2024-01-19 12:08     ` Juha-Pekka Heikkila
2024-01-19 15:22   ` Matthew Auld
2024-01-22 18:27     ` Juha-Pekka Heikkila

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